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www.irf.com
1
4/1/04
IRF6623
HEXFET
Power MOSFET
Notes
through
are on page 2
l
Application Specific MOSFETs
l
Ideal for CPU Core DC-DC Converters
l
Low Conduction Losses
l
Low Switching Losses
l
Low Profile (<0.7 mm)
l
Dual Sided Cooling Compatible
l
Compatible with Existing Surface Mount Techniques
Description
The IRF6623 combines the latest HEXFET Power MOSFET Silicon technology with the advanced DirectFET
TM
packaging to
achieve the lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The
DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and
vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufac-
turing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power
systems, IMPROVING previous best thermal resistance by 80%.
The IRF6623 balances both low resistance and low charge along with ultra low package inductance to reduce both conduction
and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the
latest generation of processors operating at higher frequencies. The IRF6623 has been optimized for parameters that are
critical in synchronous buck operating from 12 volt buss converters including Rds(on) and gate charge to minimize losses in
the control FET socke
t.
V
DSS
R
DS(on)
max
Qg(typ.)
20V
5.7m
@V
GS
= 10V
11nC
9.7m
@V
GS
= 4.5V
DirectFET
ISOMETRIC
ST
Applicable DirectFET Outline and Substrate Outline (see p.8,9 for details)
SQ
SX
ST
MQ
MX
MT
Absolute Maximum Ratings
Parameter
Units
V
DS
Drain-to-Source Voltage
V
V
GS
Gate-to-Source Voltage
I
D
@ T
C
= 25C
Continuous Drain Current, V
GS
@ 10V
I
D
@ T
A
= 25C
Continuous Drain Current, V
GS
@ 10V
A
I
D
@ T
A
= 70C
Continuous Drain Current, V
GS
@ 10V
I
DM
Pulsed Drain Current
P
D
@T
A
= 25C
Power Dissipation
g
P
D
@T
A
= 70C
Power Dissipation
g
W
P
D
@T
C
= 25C
Power Dissipation
E
AS
Single Pulse Avalanche Energy
d
mJ
I
AR
Avalanche Current
A
Linear Derating Factor
W/C
T
J
Operating Junction and
C
T
STG
Storage Temperature Range
Thermal Resistance
Parameter
Typ.
Max.
Units
R
JA
Junction-to-Ambient
fj
58
R
JA
Junction-to-Ambient
gj
12.5
R
JA
Junction-to-Ambient
hj
20
C/W
R
JC
Junction-to-Case
ij
3.0
R
J-PCB
Junction-to-PCB Mounted
1.0
Max.
16
13
120
20
20
55
-40 to + 150
2.1
0.017
1.4
42
43
12
PD - 95824B
IRF6623
2
www.irf.com
S
D
G
Repetitive rating; pulse width limited by
max. junction temperature.
Starting T
J
= 25C, L = 0.61mH,
R
G
= 25
, I
AS
= 12A.
Pulse width
400s; duty cycle
2%.
Surface mounted on 1 in. square Cu board.
Notes:
Used double sided cooling, mounting pad.
Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
T
C
measured with thermal couple mounted to top (Drain) of
part.
R
is measured at
T
J
of approximately 90C.
Static @ T
J
= 25C (unless otherwise specified)
Parameter
Min.
Typ. Max. Units
BV
DSS
Drain-to-Source Breakdown Voltage
20
V
V
DSS
/
T
J
Breakdown Voltage Temp. Coefficient
15
mV/C
R
DS(on)
Static Drain-to-Source On-Resistance
4.4
5.7
m
7.5
9.7
V
GS(th)
Gate Threshold Voltage
1.55
2.45
V
V
GS(th)
/
T
J
Gate Threshold Voltage Coefficient
-5.4
mV/C
I
DSS
Drain-to-Source Leakage Current
1.0
A
150
I
GSS
Gate-to-Source Forward Leakage
100
nA
Gate-to-Source Reverse Leakage
-100
gfs
Forward Transconductance
34
S
Q
g
Total Gate Charge
11
17
Q
gs1
Pre-Vth Gate-to-Source Charge
3.3
Q
gs2
Post-Vth Gate-to-Source Charge
1.2
nC
Q
gd
Gate-to-Drain Charge
4.0
Q
godr
Gate Charge Overdrive
2.5
See Fig. 17
Q
sw
Switch Charge (Q
gs2
+ Q
gd
)
5.2
Q
oss
Output Charge
8.9
nC
t
d(on)
Turn-On Delay Time
9.7
t
r
Rise Time
40
t
d(off)
Turn-Off Delay Time
12
ns
t
f
Fall Time
4.5
C
iss
Input Capacitance
1360
C
oss
Output Capacitance
630
pF
C
rss
Reverse Transfer Capacitance
240
Diode Characteristics
Parameter
Min.
Typ. Max. Units
I
S
Continuous Source Current
2.6
(Body Diode)
A
I
SM
Pulsed Source Current
120
(Body Diode)
c
V
SD
Diode Forward Voltage
0.81
1.0
V
t
rr
Reverse Recovery Time
20
30
ns
Q
rr
Reverse Recovery Charge
12
18
nC
I
D
= 12A
V
GS
= 0V
V
DS
= 10V
I
D
= 12A
T
J
= 25C, I
F
= 12A
di/dt = 100A/s
e
T
J
= 25C, I
S
= 12A, V
GS
= 0V
e
showing the
integral reverse
p-n junction diode.
Conditions
V
GS
= 0V, I
D
= 250A
Reference to 25C, I
D
= 1mA
V
GS
= 10V, I
D
= 15A
e
V
GS
= 4.5V, I
D
= 12A
e
V
DS
= V
GS
, I
D
= 250A
V
DS
= 16V, V
GS
= 0V
V
DS
= 16V, V
GS
= 0V, T
J
= 125C
V
GS
= 20V
V
GS
= -20V
V
GS
= 4.5V
MOSFET symbol
Clamped Inductive Load
V
DS
= 10V, I
D
= 12A
Conditions
= 1.0MHz
V
DS
= 10V, V
GS
= 0V
V
DD
= 16V, V
GS
= 4.5V
e
V
DS
= 10V
IRF6623
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3
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
I D
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
60s PULSE WIDTH
Tj = 25C
2.5V
VGS
TOP
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
BOTTOM
2.5V
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
I D
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
60s PULSE WIDTH
Tj = 150C
2.5V
VGS
TOP
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
BOTTOM
2.5V
2.5
3.0
3.5
4.0
4.5
5.0
VGS, Gate-to-Source Voltage (V)
0.1
1.0
10.0
100.0
1000.0
I D
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
)
VDS = 10V
60s PULSE WIDTH
TJ = 25C
TJ = 150C
-60 -40 -20
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature (C)
0.5
1.0
1.5
R
D
S
(
o
n
)
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
O
n
R
e
s
i
s
t
a
n
c
e
(
N
o
r
m
a
l
i
z
e
d
)
ID = 15A
VGS = 10V
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage
1
10
100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
C
,
C
a
p
a
c
i
t
a
n
c
e
(
p
F
)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
0
10
20
30
QG Total Gate Charge (nC)
0
2
4
6
8
10
12
V
G
S
,
G
a
t
e
-
t
o
-
S
o
u
r
c
e
V
o
l
t
a
g
e
(
V
)
VDS= 20V
VDS= 10V
ID= 11A
IRF6623
4
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Fig 10. Threshold Voltage vs. Temperature
Fig 9. Maximum Drain Current vs. Case Temperature
-75
-50
-25
0
25
50
75
100
125
150
TJ , Temperature ( C )
1.0
1.5
2.0
2.5
V
G
S
(
t
h
)
G
a
t
e
t
h
r
e
s
h
o
l
d
V
o
l
t
a
g
e
(
V
)
ID = 250A
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
100
T
h
e
r
m
a
l
R
e
s
p
o
n
s
e
(
Z
t
h
J
A
)
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
J
J
1
1
2
2
3
3
R
1
R
1
R
2
R
2
R
3
R
3
Ci
i
/
Ri
Ci=
i
/
Ri
C
4
4
R
4
R
4
Ri (C/W)
i (sec)
2.023 0.000678
19.48 0.240237
21.78 2.0167
14.71 58
25
50
75
100
125
150
TJ , Junction Temperature (C)
0
10
20
30
40
50
60
I D
,
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
0.2
0.4
0.6
0.8
1.0
1.2
VSD, Source-to-Drain Voltage (V)
0.1
1.0
10.0
100.0
1000.0
I S
D
,
R
e
v
e
r
s
e
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
TJ = 25C
TJ = 150C
VGS = 0V
0
1
10
100
VDS , Drain-toSource Voltage (V)
0.1
1
10
100
1000
I D
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
Tc = 25C
Tj = 150C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100sec
IRF6623
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5
Fig 13c. Maximum Avalanche Energy Vs. Drain Current
Fig 14a. Switching Time Test Circuit
Fig 14b. Switching Time Waveforms
V
GS
V
DS
90%
10%
t
d(on)
t
d(off)
t
r
t
f
V
GS
Pulse Width < 1s
Duty Factor < 0.1%
V
DD
V
DS
L
D
D.U.T
+
-
Fig 13b. Unclamped Inductive Waveforms
Fig 13a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R G
IAS
0.01
tp
D.U.T
L
VDS
+
-
VDD
DRIVER
A
15V
20V
V
GS
Fig 12. On-Resistance Vs. Gate Voltage
25
50
75
100
125
150
Starting TJ, Junction Temperature (C)
0
40
80
120
160
200
E
A
S
,
S
i
n
g
l
e
P
u
l
s
e
A
v
a
l
a
n
c
h
e
E
n
e
r
g
y
(
m
J
)
ID
TOP
5.2A
7.9A
BOTTOM
12A
2.0
4.0
6.0
8.0
10.0
VGS, Gate-to-Source Voltage (V)
4
8
12
16
20
R
D
S
(
o
n
)
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
O
n
R
e
s
i
s
t
a
n
c
e
(
m
)
TJ = 25C
TJ = 125C
ID = 15A
D.U.T.
V
DS
I
D
I
G
3mA
V
GS
.3
F
50K
.2
F
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 15. Gate Charge Test Circuit
Fig 16. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
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