1
Edition 1.3
July 1999
FLC307XP
GaAs FET & HEMT Chips
Item
Saturated Drain Current
Transconductance
Pinch-off Voltage
Gate Source Breakdown Voltage
Power-added Efficiency
Thermal Resistance
Output Power at 1dB
Gain Compression Point
Power Gain at 1dB
Gain Compression Point
Symbol
IDSS
-
1200
1800
-
600
-
-1.0
-2.0
-3.5
-5
-
-
8.5
9.5
-
-
37
-
33.5
34.8
-
VDS = 5V, IDS = 60mA
VDS = 5V, IDS = 800mA
VDS = 5V, VGS = 0V
IGS = -60A
VDS = 10V
IDS 0.6IDSS
f = 4GHz
mA
mS
V
dB
%
-
7.5
10
C/W
dBm
V
gm
Vp
VGSO
P1dB
G1dB
add
Rth
Test Conditions
Unit
Limit
Typ.
Max.
Min.
ELECTRICAL CHARACTERISTICS (Ambient Temperature Ta=25C)
Note: RF parameter sample size 10pcs. criteria (accept/reject)=(2/3)
Channel to Case
The chip must be enclosed in a hermetically sealed environment for optimum performance and reliability.
DESCRIPTION
The FLC307XP chip is a power GaAs FET that is designed for
general purpose applications in the C-Band frequency range as
it provides superior power, gain, and efficiency.
Fujitsu's stringent Quality Assurance Program assures the
highest reliability and consistent performance.
Item
Drain-Source Voltage
Gate-Source Voltage
Total Power Dissipation
Storage Temperature
Channel Temperature
Symbol
VDS
VGS
15
-5
15
-65 to +175
175
Tc = 25C
V
V
W
C
C
Ptot
Tstg
Tch
Condition
Unit
Rating
ABSOLUTE MAXIMUM RATING (Ambient Temperature Ta=25C)
Fujitsu recommends the following conditions for the reliable operation of GaAs FETs:
1. The drain-source operating voltage (VDS) should not exceed 10 volts.
2. The forward and reverse gate currents should not exceed 19.4 and -2.0 mA respectively with
gate resistance of 100.
3. The operating channel temperature (Tch) should not exceed 145C.
FEATURES
High Output Power: P1dB = 34.8dBm(Typ.)
High Gain: G1dB = 9.5dB(Typ.)
High PAE: add = 37%(Typ.)
Proven Reliability
Drain
Drain
Drain
Drain
Source
Source
Gate
Gate
Gate
Gate
2
FLC307XP
GaAs FET & HEMT Chips
POWER DERATING CURVE
DRAIN CURRENT vs. DRAIN-SOURCE VOLTAGE
8
12
16
4
0
50
100
150
200
2
4
6
8
10
Case Temperature (C)
Drain-Source Voltage (V)
Total Power Dissipation (W)
32
34
36
30
28
26
24
16
18
20
22
24
26
28
Input Power (dBm)
Output Power (dBm)
1200
800
400
Drain Current (mA)
VGS =0V
-0.5V
-1.5V
-2.0V
-1.0V
OUTPUT POWER vs. INPUT POWER
VDS=10V
IDS0.6IDSS
f = 4.2GHz
add
Pout
30
40
20
10
add
(%)
3
FLC307XP
GaAs FET & HEMT Chips
S-PARAMETERS
VDS = 10V, IDS = 800mA
FREQUENCY
S11
S21
S12
S22
(MHZ)
MAG
ANG
MAG
ANG
MAG
ANG
MAG
ANG
100
.989
-49.0
18.472
153.7
.010
64.9
.383
-164.1
500
.947
-132.8
7.971
107.3
.022
23.7
.555
-167.4
1000
.940
-155.8
4.206
90.6
.023
13.4
.587
-169.5
2000
.940
-168.6
2.080
73.7
.022
9.6
.624
-168.0
3000
.942
-173.5
1.334
61.3
.021
11.2
.665
-166.4
4000
.945
-176.3
.950
50.9
.020
15.5
.709
-165.8
5000
.948
-178.3
.717
41.9
.020
21.8
.750
-165.9
6000
.950
-180.0
.561
34.0
.020
29.3
.785
-166.6
7000
.953
178.6
.451
27.2
.021
36.9
.815
-167.5
8000
.955
177.3
.371
21.4
.022
43.7
.840
-168.6
9000
.956
176.1
.309
16.4
.024
49.5
.861
-169.7
10000
.958
174.9
.262
12.2
.026
54.2
.878
-170.8
11000
.959
173.8
.224
8.8
.029
57.8
.892
-171.9
12000
.960
172.7
.193
6.0
.031
60.5
.904
-172.9
NOTE:*
The data includes bonding wires.
n: number of wires
Gate
n=4 (0.3mm length, 25m Dia Au wire)
Drain n=4 (0.3mm length, 25m Dia Au wire)
Source n=4 (0.3mm length, 25m Dia Au wire)
Download S-Parameters, click here
For further information please contact:
FUJITSU COMPOUND SEMICONDUCTOR, INC.
2355 Zanker Rd.
San Jose, CA 95131-1138, U.S.A.
Phone: (408) 232-9500
FAX: (408) 428-9111
www.fcsi.fujitsu.com
FUJITSU MICROELECTRONICS, LTD.
Compound Semiconductor Division
Network House
Norreys Drive
Maidenhead, Berkshire SL6 4FJ
Phone:+44 (0)1628 504800
FAX:+44 (0)1628 504888
Fujitsu Limited reserves the right to change products and specifications without notice.
The information does not convey any license under rights of Fujitsu Limited or others.
1998 FUJITSU COMPOUND SEMICONDUCTOR, INC.
Printed in U.S.A. FCSI0598M200
Fujitsu Compound Semiconductor Products contain gallium arsenide
(GaAs) which can be hazardous to the human body and the environment.
For safety, observe the following procedures:
CAUTION
Do not put these products into the mouth.
Do not alter the form of this product into a gas, powder, or liquid
through burning, crushing, or chemical processing as these by-products
are dangerous to the human body if inhaled, ingested, or swallowed.
Observe government laws and company regulations when discarding this
product. This product must be discarded in accordance with methods
specified by applicable hazardous waste procedures.
4
CHIP OUTLINE
(Unit: m)
Source electrodes are electrically
insulated from the bottom of the
chip (PHS)
Die Thickness: 6020m
60
120
340
194030
70
60
520
30
150
54
70
Drain
Drain
Drain
Drain
Source
Source
Gate
Gate
Gate
Gate
54
100
FLC307XP
GaAs FET & HEMT Chips
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