CONFIDENTIAL
EK7606C PRELIMINARY DATA SHEET
CONFIDENTIAL
Eureka Microelectronics, Inc.
EK7606C
240- Output TFT LCD Analog Source Driver
6F, NO.12, INNOVATION 1
ST
. RD.,
SCIENCE-BASED INDUSTRIAL PARK,
HSIN-CHU CITY, TAIWAN, R.O.C.
http://www.eureka.com.tw
CONFIDENTIAL
EUREKA
EK7606C
July 2003 2 Preliminary Rev. 0.1
Table of Contents
Page
1.GENERAL DESCRIPTION
........................................................................
3
2.FEATURES
...........................................................................................
3
3.BLOCK DIAGRAM
..................................................................................
4
4.PIN CONFIGURATION
...........................................................................
5
5.PIN FUNCTION DESCRIPTIONS
............................................................
6
6.FUNCTION OPERATIONS
........................................................................
8
6.1 Operation timing
6.2 Sampling modes
6.3 Color mode selection
6.4 Relationship between OE and output waveform
7.ABSOLUTE MAXIMUM RATINGS
...........................................................
18
7.1 Absolute maximum ratings
7.2 Recommended operating conditions
8.ELECTRICAL CHARACTERISTICS
..........................................................
19
8.1 DC characteristics
8.2 AC characteristics
8.3 Timing chart
9.RECOMMANDED SOLDERING CONDITIONS
............................................
22
10.DEFINITIONS
.......................................................................................
22
10.1 Data sheet status and application information
10.2 Life support application
CONFIDENTIAL
EUREKA
EK7606C
July 2003 3 Preliminary Rev. 0.1
240- Output TFT LCD Analog Source Driver
1. GENERAL
DESCRIPTION
The EK7606C is an analog, fully color, source driver for TFT LCD panels designed for camera, TV etc.
Analog R, G and B signal are applied directly on the chip. For each of the 240 outputs, the voltage is
sampled and buffered to the panel. With a double sample and hold circuit a new voltage can be
sample whereas the previous sample voltage is applied to the panel.
According to different modes, the 3 input voltages (VA, VB, VC) can be applied on different output to
support various pixel array types.
The 3 input voltages (VA, VB, VC) can be sampled simultaneously or sequentially to have a better
flexibility with the input voltage. Using enable signal (STHx), several chips can be cascaded for large
panel.
2. FEATURES
LCD
outputs:
240
Bi-directional
shift
( R
L/
)
Simultaneous or Sequential RGB acquisition mode
X1 or X3 clock mode
High frequency Sampling 10MHz (x1)
Automatic low power consumption mode after data capture (gated clock)
RGB color selection (automatic or manual)
Logic power supply voltage V
DD
: 2.7V 5.25V
LCD power supply voltage AV
DD
: 4.5V 5.5V
Output dynamic range AV
SS
+0.2V to AV
DD
-0.2V
Applicable to COF/COG
CONFIDENTIAL
EUREKA
EK7606C
July 2003 - 4 - Preliminary Rev. 0.1
3. BLOCK
DIAGRAM
MODE
-
+
SHA SHB
AM
U
X
AM
UX
MU
X
SR
-
+
SHA SHB
AM
U
X
MU
X
SR
-
+
SHA SHB
AM
U
X
MU
X
SR
-
+
SHA SHB
AM
U
X
MU
X
SR
-
+
SHA SHB
AM
U
X
MU
X
SR
-
+
SHA SHB
AM
U
X
MU
X
SR
-
+
SHA SHB
AM
U
X
MU
X
SR
VA (R)
CPH1
VB (G)
VC (B)
CPH3
STH1
STH2
Q1H
INH
Q2H
TEST2
L/R
Li
n
e
Co
n
t
r
o
l
Clock
MUX
QA1
QA80
QA2
QB1
QB80
QC1
QC80
Fig. 1 Block diagram
Clock MUX
Selects if the sampling is simultaneous or sequential. Also gates the clock.
3 x 80-bit bi-directional shift register
Generates enable signals for sequential sampling 134/160 groups of 3 input colors.
Line control
Select sample circuit SHA or SHB and the high impedance output state
SH control MUX
Select which sample and hold circuit samples the analog input value.
AMUX
According to the controls signals, selects which input color goes to which group of outputs.
Sample and hold Circuit (SHA, SHB)
Sample the input voltage when the enable signal of the shift register is generated and hold this value
until it is stored on the panel.
Buffers
Drive the sample grayscale voltage on the panel.
PDF 
ZIP