PACKAGE DIMENSIONS
8/18/03
Page 1 of 11
2003 Fairchild Semiconductor Corporation
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
HCPL-0700
HCPL-0701
DESCRIPTION
The HCPL-0700 and HCPL-0701 optocouplers consist of an AlGaAs LED optically coupled to a high gain split darlington
photodetector housed in a compact 8-pin small outline package.
The split darlington configuration separating the input photodiode and the first stage gain from the output transistor permits lower
output saturation voltage and higher speed operation than possible with conventional darlington phototransistor optocoupler.
The combination of a very low input current of 0.5 mA and a high current transfer ratio of 2000% makes this family particularly
useful for input interface to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is ensured to CMOS as well as high
fan-out TTL requirements.
FEATURES
Low current - 0.5 mA
Superior CTR-2000%
Superior CMR-10 kV/s
CTR guaranteed 0-70C
*BSI, CSA and UL approval
APPLICATIONS
Digital logic ground isolation
Telephone ring detector
EIA-RS-232C line receiver
High common mode noise
line receiver
P bus isolation
Current loop receiver
NOTE
All dimensions are in inches (millimeters)
Lead Coplanarity : 0.004 (0.10) MAX
0.202 (5.13)
Pin 1
0.019 (0.48)
0.182 (4.63)
0.021 (0.53)
0.011 (0.28)
0.050 (1.27)
TYP
0.244 (6.19)
0.224 (5.69)
0.143 (3.63)
0.123 (3.13)
0.008 (0.20)
0.003 (0.08)
0.010 (0.25)
0.006 (0.16)
SEA
TI
NG PLANE
0.164 (4.16)
0.144 (3.66)
1
2
3
4
5
6
7
8
+
_
V
F
V
CC
V
B
V
O
GND
HCPL-0700 / HCPL-0701
N/C
N/C
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
HCPL-0700
HCPL-0701
8/18/03
Page 2 of 11
2003 Fairchild Semiconductor Corporation
*Samples submitted for certification - Approval pending
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25C unless otherwise specified)
Parameter
Symbol
Value
Units
Storage Temperature
T
STG
-55 to +125
C
Operating Temperature
T
OPR
-55 to +85
C
Reflow Temperature Profile (Refer to fig. 11)
EMITTER
DC/Average Forward Input Current
I
F
(avg)
20
mA
Peak Forward Input Current (50% duty cycle, 1 ms P.W.)
I
F
(pk)
40
mA
Peak Transient Input Current - (
1 s P.W., 300 pps)
I
F
(trans)
1.0
A
Reverse Input Voltage
V
R
5
V
Input Power Dissipation
P
D
35
mW
DETECTOR
Average Output Current (Pin 6)
I
O
(avg)
60
mA
Emitter-Base Reverse Voltage
V
EBR
0.5
V
Supply Voltage, Output Voltage
HCPL-0700
V
CC
,
V
O
-0.5 to 7
V
HCPL-0701
-0.5 to 18
Output power dissipation
P
D
100
mW
ELECTRICAL CHARACTERISTICS
(T
A
= 0 to 70C Unless otherwise specified)
INDIVIDUAL COMPONENT CHARACTERISTICS
Parameter
Test Conditions
Symbol
Device
Min
Typ**
Max
Unit
EMITTER
(T
A
=25C)
V
F
All
1.0
1.27
1.7
V
Input Forward Voltage
(I
F
= 1.6 mA)
1.75
Input Reverse Breakdown Voltage
(T
A
=25C, I
R
= 10 A)
BV
R
All
5.0
20
Temperature coefficient of forward voltage
(I
F
= 1.6 mA) (
V
F
/
T
A
)
All
-1.8
mV/C
DETECTOR
Logic high output current
(I
F
= 0 mA, V
O
= V
CC
= 18 V)
I
OH
HCPL-0701
0.01
100
A
(I
F
= 0 mA, V
O
= V
CC
= 7 V)
HCPL-0700
0.01
250
Logic low supply
(I
F
= 1.6 mA, V
O
= Open)
I
CCL
HCPL-0700
0.4
1.5
mA
(V
CC
= 18 V)
HCPL-0701
Logic high supply
(I
F
= 0 mA, V
O
= Open)
I
CCH
HCPL-0700
0.05
10
A
(V
CC
= 18 V)
HCPL-0701
8/18/03
Page 3 of 11
2003 Fairchild Semiconductor Corporation
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
HCPL-0700
HCPL-0701
** All typicals at T
A
= 25C
TRANSFER CHARACTERISTICS
(T
A
= 0 to 70C Unless otherwise specified)
Parameter
Test Conditions Symbol
Device
Min
Typ**
Max
Unit
COUPLED
(I
F
= 0.5 mA, V
O
= 0.4 V, V
CC
= 4.5V)
CTR
HCPL-0701
400
2000
5000
%
Current transfer ratio
(Notes 1,2)
(I
F
= 1.6 mA, V
O
= 0.4 V, V
CC
= 4.5V)
HCPL-0701
500
1300
2600
(I
F
= 1.6 mA, V
O
= 0.4 V, V
CC
= 4.5V)
HCPL-0700
300
1300
2600
Logic low output voltage
output voltage
(I
F
= 0.5 mA, I
O
= 2 mA, V
CC
= 4.5V)
V
OL
HCPL-0701
0.05
0.4
V
(I
F
= 1.6 mA, I
O
= 8 mA, V
CC
= 4.5V)
0.10
0.4
(I
F
= 5 mA, I
O
= 15 mA, V
CC
= 4.5V)
0.13
0.4
(I
F
= 12 mA, I
O
= 24 mA, V
CC
= 4.5V)
0.20
0.4
(I
F
= 1.6 mA, I
O
= 4.8 mA, V
CC
= 4.5V)
HCPL-0700
0.08
0.4
ISOLATION CHARACTERISTICS
(T
A
= 0 to 70C Unless otherwise specified)
Characteristics
Test Conditions
Symbol
Min
Typ**
Max
Unit
Input-output
insulation leakage current
(Relative humidity = 45%)
(T
A
= 25C, t = 5 s)
(V
I-O
= 3000 VDC)
(Note 4)
I
I-O
1.0
A
Withstand insulation test voltage
(R
H
50%, T
A
= 25C)
(Note 4, 5) ( t = 1 min.)
V
ISO
2500
V
RMS
Resistance (input to output)
(Note 4) (V
I-O
= 500 VDC)
R
I-O
10
12
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
HCPL-0700
HCPL-0701
8/18/03
Page 4 of 11
2003 Fairchild Semiconductor Corporation
NOTES
1. Current Transfer Ratio is defined as a ratio of output collector current, I
O
, to the forward LED input current, I
F
, times 100%.
2. Pin 7 open. Use of a resistor between pins 5 and 7 will decrease gain and delay time.
3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV
CM
/dt on the leading edge of the
common mode pulse signal, V
CM
, to assure that the output will remain in a logic high state (i.e., V
O
>2.0 V). Common mode
transient immunity in logic low level is the maximum tolerable (negative) dV
CM
/dt on the trailing edge of the common mode
pulse signal, V
CM
, to assure that the output will remain in a logic low state (i.e., V
O
<0.8 V).
4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.
5. 2500 VAC RMS for 1 minute duration is equivalent to 3000 VAC RMS for 1 second duration.
** All typicals at TA = 25C
SWITCHING CHARACTERISTICS
(T
A
= 0 to 70C unless otherwise specified., V
CC
= 5 V)
Parameter
Test Conditions
Symbol
Device
Min
Typ**
Max
Unit
Propagation delay
time to logic low
(Note 2) (Fig. 13)
(R
L
= 4.7 k
, I
F
= 0.5 mA)
T
A
= 25C
T
PHL
HCPL-0701
4
30
s
25
(R
L
= 270
, I
F
= 12 mA)
T
A
= 25C
HCPL-0701
0.2
2
1
(R
L
= 2.2 k
, I
F
= 1.6 mA)
T
A
= 25C
HCPL-0700
1.5
15
10
Propagation delay
time to logic high
(Note 2) (Fig. 13)
(R
L
= 4.7 k
, I
F
= 0.5 mA)
T
PLH
HCPL-0701
12
90
s
(R
L
= 4.7 k
, I
F
= 0.5 mA) T
A
= 25C
60
(R
L
= 270
, I
F
= 12 mA)
T
A
= 25C
HCPL-0701
1.3
10
7
(R
L
= 2.2 k
, I
F
= 1.6 mA)
HCPL-0700
7
50
T
A
= 25C
35
Common mode
transient
immunity at
logic high
(I
F
= 0 mA, |V
CM
| = 10 V
P-P
)
T
A
= 25C (R
L
= 2.2 k
) (Note 3) (Fig. 14)
|CM
H
|
HCPL-0700
1,000
10,000
V/s
HCPL-0701
Common mode
transient
immunity at
logic low
(I
F
= 1.6 mA, |V
CM
| = 10 V
P-P
, R
L
= 2.2
k
)
T
A
= 25C (Note 3) (Fig. 14)
|CM
L
|
HCPL-0700
1,000
10,000
V/s
HCPL-0701
8/18/03
Page 5 of 11
2003 Fairchild Semiconductor Corporation
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
HCPL-0700
HCPL-0701
ELECTRICAL CHARACTERISTICS
(T
A
= 0 to 70C unless otherwise specified)
3
4
2
1
6
5
7
8
2
R
1
R
IN
OUT
V
DD1
DD2
V
IN
4
3
2
5
6
7
R
2
OUT
1
8
DD2
V
R
1
Fig. 2 Non-Inverting Logic Interface
Fig. 3 Inverting Logic Interface
Current Limiting Resistor Calculations
R
1
(Non-Invert)
V
DD1
V
DF
V
OL1
I
F
--------------------------------------------------
=
R
1
(Invert)
V
DD1
V
OH1
V
DF
I
F
---------------------------------------------------
=
R
2
V
DD2
V
OLX
@I
L
I
2
(
)
=
I
L
-----------------------------------------------------------------
=
Where:
V
DD1
- Input Supply Voltage
V
DD2
- Output Supply Voltage
V
DF
-
Diode Forward Voltage
V
OL1
- Logic "0" Voltage of Driver
V
OH1
- Logic "1" Voltage of Driver
I
F
-
Diode Forward Current
V
OLX
- Saturation Voltage of
Output Transistor
I
L
-
Load Current Through
Resistor R2
I
2
-
Input Current of Output
Gate
Fig. 1 Resistor Values for Logic Interface
INPUT
OUTPUT
CMOS
@ 5V
CMOS
@ 10V
74XX
74LXX
74SXX 74LSXX 74HXX
R1 (
) R2 () R2 () R2 () R2 () R2 ()
R2 (
) R2 ()
CMOS
@ 5 V
NON-INV.
2000
1000
2200
750
1000
1000
1000
560
INV.
510
CMOS
@ 10 V
NON-INV.
5100
INV.
4700
74XX
NON-INV.
2200
INV.
180
74LXX
NON-INV.
1800
INV.
100
74SXX
NON-INV.
2000
INV.
360
74LSXX
NON-INV.
2000
INV.
180
74HXX
NON-INV.
2000
INV.
180
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