January 2006
FDS6675BZ P-Channel
PowerTr
e
nch
MO
SFET
2006 Fairchild Semiconductor Corporation
FDS6675BZ Rev. B
www.fairchildsemi.com
1
FDS6675BZ
P-Channel PowerTrench
MOSFET
-30V, -11A, 13m
General Description
This P-Channel MOSFET is producted using Fairchild
Semiconductor's advanced PowerTrench process that has
been especially tailored to minimize the on-state
resistance.
This device is well suited for Power Management and load
switching applications common in Notebook Computers
and Portable Battery Packs.
Features
Features
Max r
DS(on)
= 13m
at V
GS
= -10V, I
D
= -11A
Max r
DS(on)
= 21.8m
at V
GS
= -4.5V, I
D
= -9A
Extended V
GS
range (-25V) for battery applications
HBM ESD protection level of 5.4 KV typical (note 3)
High performance trench technology for extremely low
r
DS(on)
High power and current handing capability
RoHS Compliant
1
7
5
2
8
4
6
3
S
D
S
S
SO-8
D
D
D
G
MOSFET Maximum Ratings
T
A
= 25C unless otherwise noted
Thermal Characteristics
Package Marking and Ordering Information
Symbol
Parameter
Ratings
Units
V
DS
Drain to Source Voltage
-30
V
V
GS
Gate to Source Voltage
25
V
I
D
Drain Current -Continuous (Note 1a)
-11
A
-Pulsed
-55
P
D
Power Dissipation for Single Operation (Note 1a)
2.5
W
(Note 1b)
1.2
(Note 1c)
1.0
T
J
, T
STG
Operating and Storage Temperature
-55 to 150
C
R
JA
Thermal Resistance , Junction to Ambient (Note 1a)
50
C/W
R
JC
Thermal Resistance , Junction to Case (Note 1)
25
C/W
Device Marking
Device
Reel Size
Tape Width
Quantity
FDS6675BZ
FDS6675BZ
13''
12mm
2500 units
FDS6675BZ P-Channel
PowerTr
e
nch
MO
SFET
FDS6675BZ Rev. B
www.fairchildsemi.com
2
Electrical Characteristics
T
J
= 25C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
B
VDSS
Drain to Source Breakdown Voltage
I
D
= -250
A, V
GS
= 0V
-30
V
B
VDSS
T
J
Breakdown Voltage Temperature
Coefficient
I
D
= -250
A, referenced to
25C
-20
mV/C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= -24V, V
GS
= 0V
-1
A
I
GSS
Gate to Source Leakage Current
V
GS
= 25V, V
DS
= 0V
10
A
On Characteristics
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= -250
A
-1
-2
-3
V
V
GS(th)
T
J
Gate to Source Threshold Voltage
Temperature Coefficient
I
D
= -250
A, referenced to
25C
15.7
mV/C
r
DS(on)
Drain to Source On Resistance
V
GS
= -10V , I
D
= -11A
10.8
13.0
m
V
GS
= -4.5V, I
D
= -9A
17.4
21.8
V
GS
= -10V, I
D
= -11A
T
J
= 125
o
C
15.0
18.8
g
FS
Forward Transconductance
V
DS
= -5V, I
D
= -11A
34
S
(Note 2)
Dynamic Characteristics
C
iss
Input Capacitance
V
DS
= -15V, V
GS
= 0V,
f = 1MHz
1855
2470
pF
C
oss
Output Capacitance
335
450
pF
C
rss
Reverse Transfer Capacitance
330
500
pF
Switching Characteristics
(Note 2)
t
d(on)
Turn-On Delay Time
V
DD
= -15V, I
D
= -11A
V
GS
= -10V, R
GS
= 6
3.0
10
ns
t
r
Rise Time
7.8
16
ns
t
d(off)
Turn-Off Delay Time
120
200
ns
t
f
Fall Time
60
100
ns
Q
g
Total Gate Charge
V
DS
= -15V, V
GS
= -10V,
I
D
= -11A
44
62
nC
Q
g
Total Gate Charge
V
DS
= -15V, V
GS
= -5V,
I
D
= -11A
25
35
nC
Q
gs
Gate to Source Gate Charge
7.2
nC
Q
gd
Gate to Drain Charge
11.4
nC
Drain-Source Diode Characteristics
V
SD
Source to Drain Diode Forward Voltage V
GS
= 0V, I
S
= -2.1A
-0.7
-1.2
V
t
rr
Reverse Recovery Time
I
F
= -11A, di/dt = 100A/
s
42
ns
Q
rr
Reverse Recovery Charge
I
F
= -11A, di/dt = 100A/
s
30
nC
Notes:
1: R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the
drain pins. R
JC
is guaranteed by design while
R
CA
is determined by the user's board design.
Scale 1 : 1 on letter size paper
2: Pulse Test:Pulse Width <300
s,
Duty Cycle <2.0%
3: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
a) 50
C/W when
mounted on a 1 in
2
pad of 2 oz copper
minimun pad
c) 125
C/W when
mounted on a
b)105
C/W when
mounted on a .04 in
2
pad of 2 oz copper
FDS6675BZ P-Channel
PowerTr
e
nch
MO
SFET
FDS6675BZ Rev. B
www.fairchildsemi.com
3
Typical Characteristics
T
J
= 25C unless otherwise noted
Figure 1. On Region Characteristics
0
1
2
3
4
0
10
20
30
40
50
60
PULSE DURATION = 80
s
DUTY CYCLE = 0.5%MAX
V
GS
= -
5V
V
GS
= -
4V
V
GS
= -
3V
V
GS
= -
3.5V
V
GS
= -
4.5V
V
GS
= -
10V
-I
D
,
D
RAI
N CU
RRE
N
T
(
A)
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 2. Normalized
0
10
20
30
40
50
60
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
PULSE DURATION = 80
s
DUTY CYCLE = 0.5%MAX
NORMALIZED
D
R
A
IN T
O
SO
UR
CE O
N
-R
ESI
ST
A
N
C
E
-I
D
, DRAIN CURRENT(A)
V
GS
= -
10V
V
GS
= -
5V
V
GS
= -
4.5V
V
GS
= -
4V
V
GS
= -
3.5V
On-Resistance vs Drain
Current and Gate Voltage
Figure 3.
-80
-40
0
40
80
120
160
0.6
0.8
1.0
1.2
1.4
1.6
I
D
= -11A
V
GS
= -10V
NO
RM
AL
I
Z
E
D
D
RA
I
N
T
O
S
O
UR
CE
O
N
-
RE
S
I
S
T
AN
CE
T
J
, JUNCTION TEMPERATURE (
o
C)
Normalized On Resistance vs Junction
Temperature
Figure 4.
3.0
4.5
6.0
7.5
9.0
0
10
20
30
40
50
PULSE DURATION = 80
s
DUTY CYCLE = 0.5%MAX
T
J
= 150
o
C
T
J
= 25
o
C
I
D
= -11A
r
DS
(
o
n
)
,
DRA
IN
TO
S
O
URC
E
O
N
-RESIST
A
N
C
E
(
m
)
-V
GS
, GATE TO SOURCE VOLTAGE (V)
10
On-Resistance vs Gate to Source
Voltage
Figure 5. Transfer Characteristics
2.0
2.5
3.0
3.5
4.0
4.5
0
10
20
30
40
50
60
PULSE DURATION = 80
s
DUTY CYCLE = 0.5%MAX
T
J
= -55
o
C
T
J
= 25
o
C
T
J
= 150
o
C
-I
D
,
D
RA
I
N CU
RR
E
NT
(A)
-V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 6.
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1E-3
0.01
0.1
1
10
100
T
J
= -55
o
C
T
J
= 25
o
C
T
J
= 150
o
C
V
GS
= 0V
-I
S
,
REVER
SE D
R
A
IN C
U
R
R
E
NT (A
)
-V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Source to Drain Diode Forward
Voltage vs Source Current
FDS6675BZ P-Channel
PowerTr
e
nch
MO
SFET
FDS6675BZ Rev. B
www.fairchildsemi.com
4
Figure 7.
0
10
20
30
40
50
0
2
4
6
8
10
V
DD
= -20V
V
DD
= -10V
-V
GS
,
G
A
T
E T
O
SO
UR
CE VO
LT
A
G
E(V)
Q
g
, GATE CHARGE(nC)
V
DD
= -15V
Gate Charge Characteristics
Figure 8.
0.1
1
10
100
1000
f = 1MHz
V
GS
= 0V
CAP
A
CI
T
ANC
E
(
p
F
)
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
C
rss
C
oss
C
iss
4000
30
Capacitance vs Drain to Source Voltage
Figure 9.
0
5
10
15
20
25
30
35
1E-4
1E-3
0.01
0.1
1
10
100
1000
T
J
= 150
o
C
T
J
= 25
o
C
-I
g
(uA
)
-V
GS
(V)
I
g
vs V
GS
Figure 10.
10
-2
10
-1
10
0
10
1
10
2
1
10
T
J
= 25
o
C
T
J
= 125
o
C
-I
AS
, AV
ALANCHE
CURRENT
(
A
)
20
t
AV
, TIME IN AVALANCHE(ms)
Unclamped Inductive Switching
Capability
Figure 11.
25
50
75
100
125
150
0
2
4
6
8
10
12
V
GS
= -10V
V
GS
= -4.5V
-I
D
,
DR
AI
N CUR
RE
N
T
(
A)
T
A
, AMBIENT TEMPERATURE(
o
C)
Maximum Continuous Drain Current vs
Ambient Temperature
Figure 12.
0.1
1
10
100
0.01
0.1
1
10
100
10us
100us
1ms
10ms
100ms
1s
-I
D
,
D
RA
I
N
CU
RR
E
NT
(
A)
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
SINGLE PULSE
T
J
=MAX RATED
T
A
=
25
o
C
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
DC
30
Forward Bias Safe Operating Area
Typical Characteristics
T
J
= 25C unless otherwise noted
FDS6675BZ P-Channel
PowerTr
e
nch
MO
SFET
FDS6675BZ Rev. B
www.fairchildsemi.com
5
Figure 13. Single Pulse Maximum Power Dissipation
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
2
10
3
1
10
100
1000
SINGLE PULSE
V
GS
= -10V
P
( PK
)
, PEA
K
T
R
A
N
S
I
E
NT PO
W
E
R
(W
)
t, PULSE WIDTH (s)
2000
T
A
= 25
o
C
I = I
25
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
150 TA
125
------------------------
Figure 14.
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
2
10
3
1E-3
0.01
0.1
1
DUTY CYCLE-DESCENDING ORDER
NO
R
M
AL
IZ
E
D
TH
E
R
M
A
L
IM
P
E
DA
NC
E
,
Z
JA
t, RECTANGULAR PULSE DURATION(s)
D = 0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
2
P
DM
t
1
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
JA
x R
JA
+ T
A
Transient Thermal Response Curve
Typical Characteristics
T
J
= 25C unless otherwise noted
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
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