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Электронный компонент: FDC645

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July 2000
PRELIMINARY
2000 Fairchild Semiconductor Corporation
FDC645N Rev B(W)
FDC645N
N-Channel PowerTrench
MOSFET
General Description
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized for
low gate charge, low R
DS(ON)
and fast switching speed.
Applications
DC/DC converter
Features
5.5 A, 30 V.
R
DS(ON)
= 30 m
@ V
GS
= 4.5 V
R
DS(ON)
= 26 m
@ V
GS
= 10 V
High performance trench technology for extremely
low R
DS(ON)
Low gate charge (13 nC typical)
High power and current handling capability
D
D
D
S
D
G
SuperSOT -6
TM
6
5
4
1
2
3
Absolute Maximum Ratings
T
A
=25
o
C unless otherwise noted
Symbol
Parameter
Ratings
Units
V
DSS
Drain-Source Voltage
30
V
V
GSS
Gate-Source Voltage
12
V
I
D
Drain Current Continuous
(Note 1a)
5.5
A
Pulsed
20
Maximum Power Dissipation
(Note 1a)
1.6
W
P
D
(Note 1b)
0.8
T
J
, T
STG
Operating and Storage Junction Temperature Range
-55 to +150
C
Thermal Characteristics
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
78
C/W
R
JC
Thermal Resistance, Junction-to-Case
(Note 1)
30
C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
.645
FDC645N
7''
8mm
3000 units
F
DC64
5
N
FDC645N Rev B(W)
Electrical Characteristics
T
A
= 25C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BV
DSS
DrainSource Breakdown Voltage
V
GS
= 0 V, I
D
= 250
A
30
V
BV
DSS
===T
J
Breakdown Voltage Temperature
Coefficient
I
D
= 250
A, Referenced to 25C
22
mV/
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 24 V, V
GS
= 0 V
1
A
I
GSSF
GateBody Leakage, Forward
V
GS
= 12 V, V
DS
= 0 V
100
nA
I
GSSR
GateBody Leakage, Reverse
V
GS
= 12 V, V
DS
= 0 V
100
nA
On Characteristics
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250
A
0.8
1.4
2
V
V
GS(th)
===T
J
Gate Threshold Voltage
Temperature Coefficient
I
D
= 250
A, Referenced to 25C
4
mV/
C
R
DS(on)
Static DrainSource
OnResistance
V
GS
= 4.5 V, I
D
= 5.5 A
V
GS
= 10 V, I
D
= 6.2 A
V
GS
= 4.5 V, I
D
= 5.5 A, T
J
=125
C
25
23
34
30
26
48
m
I
D(on)
OnState Drain Current
V
GS
= 4.5 V, V
DS
= 5 V
20
A
g
FS
Forward Transconductance
V
DS
= 10 V,
I
D
= 5.5 A
33
S
Dynamic Characteristics
C
iss
Input Capacitance
1460
pF
C
oss
Output Capacitance
227
pF
C
rss
Reverse Transfer Capacitance
V
DS
= 15 V, V
GS
= 0 V,
f = 1.0 MHz
96
pF
Switching Characteristics
(Note 2)
t
d(on)
TurnOn Delay Time
8
16
ns
t
r
TurnOn Rise Time
9
18
ns
t
d(off)
TurnOff Delay Time
35
56
ns
t
f
TurnOff Fall Time
V
DS
= 15 V, I
D
= 1 A,
V
GS
= 4.5 V, R
GEN
= 6
7
14
ns
Q
g
Total Gate Charge
13
21
nC
Q
gs
GateSource Charge
3.6
nC
Q
gd
GateDrain Charge
V
DS
= 15 V, I
D
= 6.2 A,
V
GS
= 4.5 V
3.6
nC
DrainSource Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous DrainSource Diode Forward Current
1.3
A
V
SD
DrainSource Diode Forward
Voltage
V
GS
= 0 V,
I
S
= 1.3 A
(Note 2)
0.7
1.2
V
Notes:
1.
R
JA
is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain
pins. R
JC
is guaranteed by design while R
CA
is determined by the user's board design.
a. 78C/W when mounted on a 1in
2
pad of 2oz copper on FR-4 board.
b. 156C/W when mounted on a minimum pad.
2. Pulse Test: Pulse Width
=300 s, Duty Cycle =2.0%
F
DC64
5
N
FDC645N Rev B(W)
Typical Characteristics
0
5
10
15
20
0
0.5
1
1.5
2
V
DS
, DRAIN-SOURCE VOLTAGE (V)
I
D
, DRAIN CURRE
NT (
A
)
3.0V
2.5V
4.5V
2.0V
V
GS
= 10V
3.5V
0.8
1
1.2
1.4
0
5
10
15
20
25
I
D
, DRAIN CURRENT (A)
R
DS
(
O
N)
, NO
RMALIZE
D
DRAIN-
S
O
URCE
O
N
-
R
E
S
I
S
T
ANCE
V
GS
= 3.0V
3.5V
6.0V
4.0V
4.5V
5.0V
10V
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.6
0.8
1
1.2
1.4
1.6
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
R
DS
(
O
N)
, NO
RMALIZE
D
DRAIN-
S
O
URCE
O
N
-
R
E
S
I
S
T
ANC
E
I
D
= 5.5A
V
GS
= 4.5V
0.01
0.02
0.03
0.04
0.05
0.06
0.07
2
2.5
3
3.5
4
4.5
5
V
GS
, GATE TO SOURCE VOLTAGE (V)
R
DS
(
O
N)
, O
N
-
R
E
S
I
S
T
ANCE
(
O
HM)
I
D
= 3.75 A
T
A
= 125
o
C
T
A
= 25
o
C
Figure 3. On-Resistance Variation
withTemperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
5
10
15
20
25
30
1
1.5
2
2.5
3
3.5
V
GS
, GATE TO SOURCE VOLTAGE (V)
I
D
, DRAIN CURRE
NT (
A
)
T
A
= -55
o
C
125
o
C
V
DS
= 5V
25
o
C
0.0001
0.001
0.01
0.1
1
10
100
0
0.2
0.4
0.6
0.8
1
1.2
1.4
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
I
S
,
R
EVER
SE
DRAIN CURRE
NT (
A
)
T
A
= 125
o
C
25
o
C
-55
o
C
V
GS
= 0V
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
F
DC64
5
N
FDC645N Rev B(W)
Typical Characteristics
0
2
4
6
8
10
0
5
10
15
20
25
30
Q
g
, GATE CHARGE (nC)
V
GS
, G
A
TE
-
S
O
URCE
V
O
LTAG
E
(
V
)
I
D
= 5.5A
V
DS
= 5V
15
V
10V
0
400
800
1200
1600
2000
2400
0
5
10
15
20
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
CAP
ACITANCE
(
pF)
C
ISS
C
RSS
C
OSS
f = 1MHz
V
GS
= 0 V
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
0.01
0.1
1
10
100
0.1
1
10
100
V
DS
, DRAIN-SOURCE VOLTAGE (V)
I
D
, DRAIN CURRE
NT (
A
)
DC
10s
1s
100ms
100
s
R
DS(ON)
LIMIT
V
GS
= 4.5V
SINGLE PULSE
R
JA
= 156
o
C/W
T
A
= 25
o
C
10ms
1ms
0
1
2
3
4
5
0.1
1
10
100
1000
t
1
, TIME (sec)
P
(
pk
)
,
P
E
AK TRANS
IE
NT P
O
WE
R (
W
)
SINGLE PULSE
R
JA
= 156C/W
T
A
= 25C
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
0.001
0.01
0.1
1
0.0001
0.001
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
r
(t),
NO
RM
AL
I
Z
ED EF
F
E
CT
I
VE
T
RANS
I
E
NT
T
H
E
R
M
A
L
RE
S
I
S
T
ANCE
R
JA
(t) = r(t) + R
JA
R
JA
= 156C/W
T
J
- T
A
= P * R
JA
(t)
Duty Cycle, D = t
1
/ t
2
P(pk)
t
1
t
2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
F
DC64
5
N
1998 Fairchild Semiconductor Corporation
Embo ssed
Carrier Tape
SSOT-6 Packaging
Configuration:
Figur e 1.0
Comp onent s
Lead er Tape
500mm mi nimum or
125 emp ty poc kets
Traile r Tape
300mm mi nimum or
75 empty poc kets
SSOT-6 Tape Leader and Trailer
Configuration:
Figur e 2.0
Cover Tape
Carrier Tape
Note/Comments
Packaging Option
SSOT-6 Packaging Information
Standard
(no
f l ow c ode )
D87Z
Packaging type
Reel Size
TNR
7" Dia
TNR
13"
Qty per Reel/Tube/Bag
3,000
10,000
Box Dimension (mm)
184x187x47
343x343x64
Max qty per Box
9,000
30,000
Weight per unit (gm)
0.0158
0.0158
Weight per Reel (kg)
0.1440
0.4700
F63TNR
Label
Customize Lab el
Anti static Cover Tape
184mm x 187mm x 47mm
Pizza Box fo r Standar d Opti on
F63TNR
Label
F63TNR Labe l
F63TNR Labe l sa mpl e
343mm x 342mm x 64mm
Intermediate bo x fo r D87Z Option
F63TNR
Label
SSOT-6 Unit Orientation
631
631
631
631
631
Pin 1
LOT: CBVK741B019
FSID: FDC633N
D/C1: D9842 QTY1:
SPEC REV:
SPEC:
QTY: 3000
D/C2:
QTY2:
CPN:
N/F: F (F63TNR)3
Packaging Description:
SSOT-6 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
3,000 units per 7" or 177cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 10,000 units per 13"
or 330cm diameter reel. This and some other options are
described in the Packaging Information table.
These full reels are individually barcode labeled and
placed inside a pizza box (illustrated in figure 1.0) made of
recyclable corrugated brown paper with a Fairchild logo
printing. One pizza box contains three reels maximum.
And these pizza boxes are placed inside a barcode
labeled shipping box which comes in different sizes
depending on the number of parts shipped.
SuperSOT
TM
-6 Tape and Reel Data and Package Dimensions
August 1999, Rev. C
P1
A0
D1
P0
F
W
E1
D0
E2
B0
Tc
Wc
K0
T
Dimensions are in inches and millimeters
Tape Size
Reel
Option
Dim A
Dim B
Dim C
Dim D
Dim N
Dim W1
Dim W2
Dim W3 (LSL-USL)
8mm
7" Dia
7.00
177.8
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
2.165
55
0.331 +0.059/-0.000
8.4 +1.5/0
0.567
14.4
0.311 0.429
7.9 10.9
8mm
13" Dia
13.00
330
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
4.00
100
0.331 +0.059/-0.000
8.4 +1.5/0
0.567
14.4
0.311 0.429
7.9 10.9
See detail AA
Dim A
max
13" Diameter Option
7" Diameter Option
Dim A
Max
See detail AA
W3
W2 max Measured at Hub
W1 Measured at Hub
Dim N
Dim D
min
Dim C
B Min
DETAIL AA
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum component rotation
0.5mm
maximum
0.5mm
maximum
Sketch C (Top View)
Component lateral movement
Typical
component
cavity
center line
20 deg maximum
Typical
component
center line
B0
A0
Sketch B (Top View)
Component Rotation
Sketch A (Side or Front Sectional View)
Component Rotation
User Direction of Feed
SSOT-6 Embossed Carrier Tape
Configuration:
Figure 3.0
SSOT-6 Reel Configuration: Figure 4.0
Dimensions are in millimeter
Pkg type
A0
B0
W
D0
D1
E1
E2
F
P1
P0
K0
T
Wc
Tc
SSOT-6
(8mm)
3.23
+/-0.10
3.18
+/-0.10
8.0
+/-0.3
1.55
+/-0.05
1.125
+/-0.125
1.75
+/-0.10
6.25
min
3.50
+/-0.05
4.0
+/-0.1
4.0
+/-0.1
1.37
+/-0.10
0.255
+/-0.150
5.2
+/-0.3
0.06
+/-0.02
SuperSOT
TM
-6 Tape and Reel Data and Package Dimensions, continued
July 1999, Rev. C
1998 Fairchild Semiconductor Corporation
SuperSOT -6 (FS PKG Code 31, 33)
SuperSOT
TM
-6 Tape and Reel Data and Package Dimensions, continued
September 1998, Rev. A
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0158
TRADEMARKS
ACExTM
BottomlessTM
CoolFETTM
CROSSVOLTTM
E
2
CMOS
TM
FACTTM
FACT Quiet SeriesTM
FAST
FASTrTM
GTOTM
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
SuperSOTTM-8
SyncFETTM
TinyLogicTM
UHCTM
VCXTM
HiSeCTM
ISOPLANARTM
MICROWIRETM
POPTM
PowerTrench
QFETTM
QSTM
Quiet SeriesTM
SuperSOTTM-3
SuperSOTTM-6
Rev. E