UTC4558
LINEAR INTEGRATED CIRCUIT
YOUW ANG ELECTRONICS CO.LTD
1
DUAL OPERATIONAL
AMPLIFIER
DESCRIPTION
The UTC4558 is a monolithic integrated circuit
designed for dual operational amplifier.
FEATURES
*No frequency compensation required.
*No latch-up
*Large commom mode and differential voltage range
*Parameter tracking over temperature range
*Gain and phase match between amplifiers
*Internally frequency compensated
*Low noise input transistors
DIP-8
SOP-8
BLOCK DIAGRAM
Vcc
Vee
IN(-)
IN(+)
OUTPUT
1
2
3
4
8
7
6
5
OUT2
IN2(-)
IN1(+)
Vee
Vcc
OUT1
IN1(-)
IN2(+)
ABSOLUTE MAXIMUM RATINGS
Characteristic
Symbol
Value
Unit
Supply Voltage
Vcc
22
V
Differential input voltage
V
I(DIFF)
18
V
Power Dissipation
P
D
400
mW
Input Voltage
V
I
15
V
Operating Temperature
T
OPR
0~+70
C
Storage Temperature
T
STG
-65~+150
C
UTC4558
LINEAR INTEGRATED CIRCUIT
YOUW ANG ELECTRONICS CO.LTD
2
ELECTRICAL CHARACTERISTICS
( Ta=25
C ,Vcc=15V,Vee=-15V)
Characteristic
Symbol
Test Condition
Min
Typ.
Max
Unit
Supply Current
Icc
3.5
5.6
mA
Input offset voltage
V
IO
Rs<10k
2
6
mV
Input offset current
I
IO
5
200
nA
Input bias current
I
BIAS
30
500
nA
Large signal voltage gain
Gv
Vo(p-p)=10V,R
L
<2k
20
200
V/mV
Commom Mode Input Voltage
Range
V
I(R)
12
13
V
Commom Mode Rejection Ratio
CMRR
Rs<10k
70
90
dB
Supply Voltage Rejection Ratio
PSRR
Rs<10k
76
90
dB
Output Voltage swing
Vo(p-p)
R
L
>10k
12
14
V
Power Comsumption
Pc
70
170
mV
Slew Rate
SR
Vi=10V,R
L
>2k
,C
L
<100pF
1.2
V/
s
Rise Time
T
RIS
Vi=20mV,R
L
>2k
C
L
<100pF
0.3
s
Overshoot
OS
Vi=20mV,R
L
>2k
,C
L
<100pF
15
%
TYPICAL PERFORMANCE CHARACTERISTICS
10
10
2
10
3
6
10
Fig.3 Power bandwith(large signal
swing vs frequency)
O
u
tput
Vol
t
age
(
V
)
Frequency (Hz)
10
4
10
5
0
4.0
8.0
12.0
16.0
20.0
24.0
28.0
32.0
Fig.1 Positive output voltage swing vs Load
resistance
Load resistance ( )
10
2
10
4
10
5
10
3
1.0
3.0
5.0
9.0
11.0
13.0
15.0
7.0
O
u
tput
Vol
t
age
(
peak
)
(V
)
Fig.2 Positive output voltage swing vs Load
resistance
O
u
tput
Vol
t
age
(
peak
)
(V
)
load resistance ( )
10
2
10
4
10
5
10
UTC4558
LINEAR INTEGRATED CIRCUIT
YOUW ANG ELECTRONICS CO.LTD
3
0
20
40
60
80
100
120
140
Fig. 7 Spectral Noise Density
I
nput
N
o
i
s
e(nV
/
H
z
)
Frequency
Hz)
10
100
10
5
10
3
10
4
10
6
Gv=10
Rs=100k
10
10
2
10
3
6
10
10
-1
1
10
Fig. 6 Output Noise vs Rs
O
u
t
p
u
t
No
ise
(
RMS
)
(mV
)
Rs ( )
10
4
10
5
10
-2
Gv=1000
Gv=100
Gv=10
Gv=1
10
10
2
10
3
6
10
Fig. 4 Burst Noise vs Rs
I
n
put
N
oi
s
e
(peak
)
(mV
)
Rs ( )
10
4
10
5
1
10
10
2
10
3
BW=1.0Hz To 1.0KHz
10
10
2
10
2
6
10
Fig. 5 RMS Noise vs Rs
I
nput
N
oi
s
e
(R
M
S
)
(
V)
Rs ( )
10
4
10
5
0.1
1
10
10
3
0
20
40
60
80
100
120
140
Fig. 8 Open loop frequency
response
Frequency
Hz)
Av
d
(
d
B
)
-20
10
100
10
5
10
3
10
4
10
6
1
10
7
10
100
10
5
10
3
10
4
10
6
1
10
7
Frequency
Hz)
Fig. 9 PHASE MARGIN vs
FREQUENCY
PH
ASE
M
A
R
G
I
N
0
20
40
60
80
100
120
140
160
180
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