ChipFind - документация

Электронный компонент: CS18101

Скачать:  PDF   ZIP

Document Outline

Copyright 2004 Cirrus Logic, Inc.
July 2004
DS651UM20
http://www.cirrus.com
Digital
Audio
Networking
Processor
CS18101
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
CobraNet
CS18101
and
CPB-18101-CM-2
Hardware
User's
Manual
Version 2.0
TM
2
Copyright 2004 Cirrus Logic, Inc.
DS651UM20
CobraNet Hardware User's Manual
32-bit Audio Decoder DSP Family
- NOTES -
CobraNet Hardware User's Manual
Table of Contents
DS651UM20
Copyright 2004 Cirrus Logic, Inc.
3
Version 2.0
Table of Contents
List of Figures .................................................................................................................................. 4
1.0 Introduction ...................................................................................................................................... 5
2.0 Features .......................................................................................................................................... 6
2.1 CobraNet ............................................................................................................................ 6
2.2 CobraNet Interface ............................................................................................................. 6
2.3 Host Interface ..................................................................................................................... 7
2.4 Asynchronous Serial Interface............................................................................................ 7
2.5 Synchronous Serial Audio Interface ................................................................................... 7
2.6 Audio Clock Interface ......................................................................................................... 7
2.7 Audio Routing and Processing ........................................................................................... 7
3.0 Hardware ......................................................................................................................................... 8
4.0 Pinout and Signal Descriptions........................................................................................................ 9
4.1 CS18101 Package Pinouts............................................................................................... 10
4.1.1
CS18101 Pinout ............................................................................................ 10
4.1.2
CM-2 Connector Pinout................................................................................. 11
4.2 Signal Descriptions ........................................................................................................... 12
4.2.1
Host Port Signals .......................................................................................... 12
4.2.2
Asynchronous Serial Port (UART Bridge) Signals ........................................ 12
4.2.3
Synchronous Serial (Audio) Signals.............................................................. 13
4.2.4
Audio Clock Signals ...................................................................................... 13
4.2.5
Miscellaneous Signals................................................................................... 14
4.2.6
Power and Ground Signals ........................................................................... 14
4.2.7
System Signals ............................................................................................. 15
5.0 Synchronization ............................................................................................................................. 16
5.1 Synchronization Modes .................................................................................................... 16
5.1.1
Internal Mode ................................................................................................ 17
5.1.2
Internal Mode with External Sample Synchronization ................................... 17
5.1.3
External Word Clock Mode ........................................................................... 17
5.1.4
External Master Clock Mode ......................................................................... 18
5.1.5
External Master Clock Mode with External Sample Synchronization............ 18
6.0 Digital Audio Interface ................................................................................................................... 19
6.1 Digital Audio Interface Timing........................................................................................... 20
6.1.1
Normal Mode Data Timing ............................................................................ 21
6.1.2
I2S Mode Data Timing .................................................................................. 21
7.0 Host Management Interface (HMI) ................................................................................................ 22
7.1 Hardware .......................................................................................................................... 22
7.3 Protocol and Messages .................................................................................................... 25
7.3.1
Messages ...................................................................................................... 25
7.3.1.1. Translate Address ................................................................................. 26
7.3.1.2. Interrupt Acknowledge........................................................................... 26
7.3.1.3. Goto Packet........................................................................................... 26
7.3.1.4. Goto Translation .................................................................................... 26
7.3.1.5. Packet Received ................................................................................... 27
7.3.1.6. Packet Transmit .................................................................................... 27
7.3.1.7. Goto Counters ....................................................................................... 27
7.3.2
Status ............................................................................................................ 28
7.3.3
Data............................................................................................................... 29
7.3.3.1. Region length ........................................................................................ 29
7.3.3.2. Writable Region ..................................................................................... 29
7.3.3.3. Translation Complete ............................................................................ 29
7.3.3.4. Packet Transmission Complete............................................................. 29
4
Copyright 2004 Cirrus Logic, Inc.
DS651UM20
Version 2.0
CobraNet Hardware User's Manual
List of Figures
7.3.3.5. Received Packet Available .................................................................... 29
7.3.3.6. Message Togglebit ................................................................................ 29
8.0 HMI Reference Code ..................................................................................................................... 30
8.1 HMI Definitions ................................................................................................................. 30
8.2 HMI Access Code ............................................................................................................. 31
8.3 CM-1, CM-2 Auto-detection .............................................................................................. 33
9.0 Mechanical Drawings and Schematics .......................................................................................... 34
9.1 CM-2 Mechanical Drawings.............................................................................................. 35
9.2 CM-2 Schematics ............................................................................................................. 41
9.3 CS18101 Package............................................................................................................ 48
9.4 Temperature Specifications .............................................................................................. 49
List of Figures
Figure 1. CobraNet Data Services ......................................................................................................... 5
Figure 2. CobraNet Interface Hardware Block Diagram......................................................................... 8
Figure 3. Audio Clock Sub-system....................................................................................................... 16
Figure 4. Channel Structure for Synchronous Serial Audio (One Sample Period)............................... 19
Figure 5. Timing Relationship between FS512_OUT, DAO1_SCLK and FS1..................................... 20
Figure 6. Serial Port Data Timing Overview......................................................................................... 20
Figure 7. Audio Data Timing Detail - Normal Mode ............................................................................. 21
Figure 8. Audio Data Timing Detail - I2S Mode.................................................................................... 21
Figure 9. Host Port Read Cycle Timing................................................................................................ 24
Figure 10. Host Port Write Cycle Timing.............................................................................................. 24
Figure 11. CM-2 Module Assembly Drawing........................................................................................ 35
Figure 12. General PCB Dimensions ................................................................................................... 36
Figure 13. Example Configuration, Side View...................................................................................... 37
Figure 14. Faceplate Dimensions ........................................................................................................ 38
Figure 15. Case Cutout for Faceplate Mounting .................................................................................. 39
Figure 16. Connector Detail ................................................................................................................. 40
Figure 17. CM-2 RevE Schematic Page 1 of 7 .................................................................................... 41
Figure 18. CM-2 RevE Schematic Page 2 of 7 .................................................................................... 42
Figure 19. CM-2 RevE Schematic Page 3 of 7 .................................................................................... 43
Figure 20. CM-2 RevE Schematic Page 4 of 7 .................................................................................... 44
Figure 21. CM-2 RevE Schematic Page 5 of 7 .................................................................................... 45
Figure 22. CM-2 RevE Schematic Page 6 of 7 .................................................................................... 46
Figure 23. CM-2 RevE Schematic Page 7 of 7 .................................................................................... 47
Figure 24. 144-Pin LQFP Package Drawing ........................................................................................ 48
CobraNet Hardware User's Manual
Introduction
DS651UM20
Copyright 2004 Cirrus Logic, Inc.
5
Version 2.0
1.0 Introduction
This document is intended to help hardware designers integrate the CobraNet
TM
interface
into an audio system design. It covers the CS18101 device and CPB-18101-CM-2 (CM-2)
CobraNet module. All other CobraNet designs are described in separate documentation.
CobraNet is a combination of hardware (the CobraNet interface), network protocol, and
firmware. CobraNet operates on a switched Ethernet network and provides the following
additional communications services.
Isochronous (Audio) Data Transport
Sample Clock Distribution
Control and Monitoring Data Transport
The CobraNet interface performs synchronous-to-isochronous and isochronous-to-
synchronous conversions as well as the data formatting required for transporting real-time
digital audio over the network.
The CobraNet interface has provisions for carrying and utilizing control and monitoring
data such as
Simple Network Management Protocol (SNMP) through the same network
connection as the audio. Standard data transport capabilities of Ethernet are shown here
as unregulated traffic. Since CobraNet is Ethernet based, in most cases, data
communications and CobraNet applications can coexist on the same physical network.
Figure 1
illustrates the different data services available through the CobraNet system.
Figure 1. CobraNet Data Services
Isochronous Data
(Audio)
Control Data
Clock
Unregulated
Traffic
Ethernet
Ethernet
Control Data
Isochronous Data
(Audio)
Unregulated
Traffic
Clock