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CAT310
2005 Catalyst Semiconductor, Inc.
1
Doc No. 25087, Rev. 00
Characteristics subject to change without notice
10 Channel Automotive LED Display Driver
FEATURES
Automotive "load dump" protection (40V)
10 independent LED channels
Up to 50mA output per channel
Overvoltage detection at 19V
Serial interface for channel programming
Daisy chain output for multi-driver cascading
LED blanking control
Operating temperature from -40C to +125C
20-pin SOIC package
APPLICATIONS
Automotive
lighting
White and other color high brightness LEDs
Multi-color high-brightness LED cluster displays
General LED lighting
ORDERING INFORMATION
Part
Number
Package Quantity
per Reel
Package
Marking
CAT310J SOIC-20 1000 CAT310J
CAT310W SOIC-20
Lead free
1000 CAT310W
PRODUCT DESCRIPTION
The CAT310 is a 10-channel LED driver for
automotive and other lighting applications. All
LED output channels are driven from a low on-
resistance open-drain High Voltage CMOS
Nch-FETs and are fully compliant with "Load
Dump" transients of up to 40 volts. The LED
bias current of each channel can be set
independently using an external series ballast
resistor, making the device ideal for multi-color
instrumentation displays.
A high-speed serial interface (suitable with both
3.3 volt and 5 volt systems) feeding a 10 bit
shift register is used to program the desired
state (on/off) of each channel. The device offers
a blanking control pin (BLANK) which can be
used to disable all channels on demand. A
serial output data pin (SOUT) is provided to
daisy-chain devices in large cluster LED
applications
During initial power up all channels are reset
and cleared via an under-voltage lock out
(UVLO) detector and for added protection all
channels are disabled in the event of a battery
over-voltage condition (19 volts or more).
TYPICAL APPLICATION CIRCUIT
PIN DIAGRAM
SOIC 20-pin package
CAT310
2005 Catalyst Semiconductor, Inc.
2
Doc No. 25087, Rev. 00
Characteristics subject to change without notice
ABSOLUTE MAXIMUM RATINGS
Parameter Rating
Unit
VCC voltage
7
V
Input voltage range (SIN, SCLK,
BLANK, XLAT)
-0.3V to VCC+0.3V
V
SOUT voltage range
-0.3V to VCC+0.3V
V
Peak OUT0 to OUT9 voltage
40
V
VBATT input voltage
40
V
DC output current on OUT0 to OUT9
70
mA
Storage Temperature Range
-55 to +160
C
Operating Junction Temperature Range
-40 to +150
C
Lead Soldering Temperature (10sec.)
300
C
ESD Rating: Low Voltage Pins
Human Body Model
Machine Model
3000
300
V
ESD Rating: VBATT, OUT[0:9] pins
Human Body Model
Machine Model
1000
100
V
RECOMMENDED OPERATING CONDITIONS
Parameter Range
Unit
VCC
3.0 to 5.5
V
Voltage applied to OUT0 to OUT9
9 to 17
V
Output current on OUT0 to OUT9
0 to 50
mA
Ambient Temperature Range
-40 to +125
C
ELECTRICAL OPERATING CHARACTERISTICS
DC Characteristics
VCC = 5.0V, -40C T
A
125 C, over recommended operating conditions unless specified
otherwise.
Symbol Name
Conditions
Min
Typ
Max
Units
I
STBY
Standby Quiescent Current
Static input signal. All
outputs turned off.
1
10
A
V
OVP
VBATT Over Voltage
Protection Trigger threshold
17
19
21
V
V
UVLO
VCC Under Voltage Lockout
Trigger threshold
1.7
2.5
V
R
SW
Switch on resistance for
OUT0 to OUT9
I
O(n)
= 30mA
2
5
12
I
O(n)LKG
OUT0 to OUT9 Output Switch
Leakage
V
(OUT(n))
= 15V
0.1
10
A
I
XLAT
XLAT Internal Pull-down
current
XLAT = V
CC
XLAT = 0.3V
4
1
10
3
30
6
A
I
BLANK
BLANK Internal Pull-up
current
BLANK = 0V
BLANK = V
CC
- 0.3V
4
1
10
3
30
6
A
V
IH
V
IL
Logic high input voltage
Logic low input voltage
0.3 V
CC
0.7V
CC
V
I
IL
Logic Input leakage current
(SCLK, SIN)
V
I
= V
CC
or GND
-5
0
5
A
V
OH
V
OL
SOUT logic high output voltage
SOUT logic low output voltage
I
OH
= -1mA
I
OL
= 1mA
V
CC
-0.3V
0.3
V
CAT310
2005 Catalyst Semiconductor, Inc.
3
Doc No. 25087, Rev. 00
Characteristics subject to change without notice
ELECTRICAL OPERATING CHARACTERISTICS
Switching Characteristics
VCC = 5.0V, -40C T
A
125 C, over recommended operating conditions unless
specified otherwise.
Symbol Name
Conditions
Min Typ Max Units
SCLK
f
SCLK
SCLK Clock Frequency
10
MHz
t
wh/wl
SCLK Pulse width
High or Low
30
ns
SIN
t
su
Setup time SIN to SCLK
10
ns
t
h
Hold time SIN to SCLK
10
ns
XLAT
t
w
XLAT Pulse width
SIN to SCLK
20
ns
t
h
Hold time
SCLK to XLAT
20
ns
t
r
SOUT rise time (10% to 90%) C
L
= 15pF
20
ns
t
f
SOUT fall time (90% to 10%)
C
L
= 15pF
15
ns
t
pd
Propagation
delay
time Blank
to OUT(n)
25
ns
t
pd
Propagation
delay
time Blank
to OUT(n)
25
ns
t
pd
Propagation delay time
SCLK to SOUT
25
ns
All logic inputs contain Schmitt trigger inputs.
BLOCK DIAGRAM
CAT310
2005 Catalyst Semiconductor, Inc.
4
Doc No. 25087, Rev. 00
Characteristics subject to change without notice
PIN DESCRIPTIONS
VCC
is the supply input for the internal logic
and is compatible with both 3.3V and 5V
systems. The logic is held in a reset state until
VCC exceeds 2.5V. It is recommended that a
small bypass ceramic capacitor (1uF) be
placed between VCC and GND pins on the
device.
SIN
is the CMOS logic pin for delivering the
serial input data stream into the internal 10-bit
shift register. The most recent or last data
value in the serial stream is used to configure
the state of output channel "zero" (OUT0).
During the initial power up sequence all
contents of the shift register are reset and
cleared to zero.
SCLK
is the CMOS logic pin used to clock
the internal shift register. On each rising edge
of clock, the serial data will advance through
one stage of the shift register.
XLAT
is the CMOS logic input used to
transfer data from the 10-bit shift register into
the output channel latches. An internal pull-
down current of 10 microampere is present on
this pin. When XLAT is low, the state of each
output channel remains unchanged. When
XLAT is driven high, the contents of the shift
register appear at their respective output
channels. An external pull-up resistance of
10k
or less is adequate for logic high.
PGND, GND
pins should be connected to
the ground on the PCB.
BLANK
is the CMOS logic input (active high)
used to temporarily disable all outputs. An
internal pull-up current of 10 microampere is
present on this pin. The BLANK pin must be
driven to a logic low in order for channel outputs
to resume normal operation. An external pull-
down resistance of 10k
or less is adequate for
logic low.
SOUT
is the CMOS logic output used for daisy
chain applications. The serial output data
stream is fed from the last stage of the internal
10-bit shift register. On each rising edge of the
clock, the SOUT value will be updated. The
data value present on this pin is identical to the
data value being used for configuring the state
of output channel nine (OUT9). At initial power
up, the SOUT data stream will contain all
zeroes until the shift register has been fully
loaded.
VBATT
input monitors the battery voltage. If an
over-voltage, above 19V typical, is detected, all
outputs are disabled. Upon conclusion of the
over-voltage condition, all outputs resume
normal operation. The current drawn by the
VBATT pin is less than 1 microampere during
normal operation.
OUT0-OUT9
are the ten LED outputs
connected internally to the switch N-channel
FETs. They sink currents up to 50mA per
channel and can withstand transients up to 40V
compatible with automotive "load dump". The
output on-resistance is 5
, and the off-
resistance is 5M
.
PIN TABLE
Pin Number
Pin Name
Description/Function
1
SCLK
Clock input for the data shift register.
2
XLAT
Control input for the data latch.
3
SIN
Serial data input.
4
SOUT
Serial data output.
5 GND
Ground.
6-10
OUT4 - OUT0
Open drain outputs.
11-15
OUT9 - OUT5
Open drain outputs.
16
PGND
Ground for LED driver outputs.
17
VBATT
Battery sense input.
18
VCC
Power supply voltage for the logic
19
BLANK
Blank input. When BLANK is high, all the output drivers are turned off.
20 N.C.
No
connect.
CAT310
2005 Catalyst Semiconductor, Inc.
5
Doc No. 25087, Rev. 00
Characteristics subject to change without notice
TYPICAL CHARACTERISTICS
VCC = 5V, VBATT = 14V, T
AMB
= 25C, unless otherwise specified.
VBATT Overvoltage Detection
Amplitude between 16V and 26V
18V
XLAT pull-down Current vs. Input Voltage
0
2
4
6
8
10
12
14
0
1
2
3
4
5
XLAT VOLTAGE [V]
X
L
A
T
C
URRE
NT
[
u
A
]
-40C
85C
125C
25C
VBATT Load Dump
40V
BLANK and Output waveform
BLANK pull-up Current vs. Input Voltage
0
2
4
6
8
10
12
14
0
1
2
3
4
5
BLANK VOLTAGE [V]
BL
AN
K C
U
R
R
E
N
T
[u
A]
VCC = 5V
-40C
85C
25C
125C
Switch On-resistance vs. VCC
0
2
4
6
8
10
12
2
3
4
5
6
VCC VOLTAGE [V]
SW
IT
C
H
O
N
R
ESIST
A
N
C
E
[
]
25C
125C
85C
-40C
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