1
Copyright 2001, Capella Microsystems, Inc.
880 East Arques Avenue, Sunnyvale, CA 94085-4536 USA 408.328.8360 FAX.408.328.8361
CM1207
Integrated PD+TIA
DESCRIPTION
The Capella CM1207 is an industry first
fully CMOS combo chip PDIC (photodiode
and transimpedence amplifier integrated
circuit) designed for use in next generation
12-16x DVD-ROM, DVD-Combo and 50x+
CD-ROM drives.
The CM1207 incorporates Capella's
patented offset voltage control Auto-
Calibration Circuitry (ACC). The ACC
automatically activates 77mS (typ.) after
the CM1207 is powered up beyond an
internal under-voltage lockout threshold of
4V (typ.). The ACC reduces the offset in
each of the photodetector channels and
completes the calibration before the disk is
up to speed.
FEATURES
PDIC with internal RF summing.
(Includes 8 photodiodes as well as I/V technology all in one chip)
High speed, high performance PDIC
Used for reading the following types of media:
DVD, DVD-ROM, CD-ROM, CD-Audio, CD-R,
CD-RW
High PD sensitivity
Uses a small, thin sized package.
(Package dimensions: 4.0 x 5.0 x 1.5 mm CMP
4.0 x 5.0 x 1.1 mm COB)
Optimized for red (=650nm), and infrared
(=780nm) laser diodes for DVD and CD
applications
Supports:
- Focus Servo (Astigmatism method)
- Tracking servo (Three beam method)
- Tracking servo (DPD for DVD)
Best in class with negligible channel cross-talk
and PDIC surface reflections
APPLICATIONS
DVD-DRIVES
CD-DRIVES
DVD / CD-R / CD-RW Combo Drives
DISCLAIMER
Capella Microsystems Inc. reserves the right to make changes in specifications or discontinue this product at any time
without notice. Please contact Capella Microsystems Inc. for possible updates before starting a design.
Capella Microsystems Inc. products are not designed for use in life support applications. Any parties who use these products
in such applications do so at their own risk and agree to fully indemnify Capella Microsystems Inc. for any damages resulting
from such improper usage or sale.
Revision: 2.6
Date: 20-Dec-01
CM1207 -- Integrated PD+TIA
2
Copyright 2001, Capella Microsystems, Inc.
Figure 1: CM1207 Block Diagram
Absolute Maximum Ratings
Description Symbol Value Unit
Power Supply Voltage
V
CC
6.0 V
Output Voltage
Vo
Vcc + 0.5
V
Storage Temperature
Tstg
-40 ~ +85
C
Soldering Temperature
Tsol
260
C
Recommended Operating Conditions
Note 1: VS must be able to sink/source 500A
Note 2: The photodiode sensitivity for the =780nm laser diode will be equivalent to or exceed
the photodiode sensitivity for the =650nm laser diode.
Description Signal
Condition
Min.
Typ.
Max.
Unit
Operating Supply Voltage Range
V
CC
-
4.75
5.0
5.25
V
Operating Reference Voltage Range 1
V
S1
(Note
1) 2.0
2.1
2.2 V
Operating Reference Voltage Range 2
V
S2
(Note
1) 2.4
2.5
2.6 V
Operating Temperature Range
Topr
0
70
C
CM1207 -- Integrated PD+TIA
3
Copyright 2001, Capella Microsystems, Inc.
Table 1: CM1207 Pin Descriptions
Pin
No.
Pin
Signal
I/O
I/O Equivalent Circuit
Pin Description
4 V
A
5 V
B
9 V
C
10 V
D
12 V
E1
11 V
E2
2 V
F1
1 V
F2
O
The optical input signal on
respective photodiodes is converted
to a voltage at the output pins.
3 V
RF
O
RF output voltage represents the
summing of the A ~ D channel
voltages. (RF is internally biased to
1.4V)
7 GND I
GND
(Ground)
6 V
S
I
Reference voltage input pin
provided by a stable external
voltage source (typically 2.1V).
8 V
CC
I
5V 5% DC Supply
CM1207 -- Integrated PD+TIA
4
Copyright 2001, Capella Microsystems, Inc.
Electrical Characteristics
(Ta = 25C, V
CC
= 5V, V
S
=2.1V, R
L
=10K, C
L
= 10pf)
Description
Symbol
Condition
Min. Typ. Max. Unit Applies
to
Current Consumption
I
CC
All output pins open
34
mA
V
CC
Output Offset Voltage 1
V
OD1
Offset voltage with respect
to Vs (Note 3)
-30 0 +30
mV
V
A
~ V
D
Output Offset Voltage 2
V
OD2
Offset voltage with respect
to Vs (Note 3)
-25 0 +25
mV
V
E1
~ V
F2
Output Offset Voltage 3
V
OD3
Offset voltage with respect
to GND (Note 3)
1.25 1.4 1.55 V
V
RF
(A+B)-(C+D) (Note 3) -20 0 +20
V
A
~ V
D
(A+D)-(B+C) (Note 3) -20 0 +20
V
A
~ V
D
(A+C)-(B+D) (Note 3) -20 0 +20
V
A
~ V
D
Output Offset Voltage
Difference
V
OD
(E
2
+F
1
)-(E
1
+F
2
) (Note 3) -20 0 +20
mV
V
E1
~ V
F2
Maximum Output
Voltage 1
V
OH1
P
O
= 100W
3.5
-
-
V
V
A
~ V
D
Maximum Output
Voltage 2
V
OH2
P
O
= 100W
3.5
-
-
V
V
RF
Automatic Calibration
power on setup time
T
SU
During power up
50
77
150
ms
A
O
~ F
O
,
RF
O
Automatic Calibration
Time
T
ACC
During power up or when the
layer pin is toggled
- - 1
ms
A
O
~ F
O
,
RF
O
Note 3: Dark conditions, which implies no light incident on the photodiode.
Photodiode Characteristics 1
(Ta = 25C, V
CC
= 5V, V
S
=2.1V, R
L
=10K, C
L
= 10pf, =650 nm)
Description
Symbol
Condition
Min. Typ. Max. Unit Applies
to
Sensitivity 1
R
P1
P
O
= 10W
16
20
24
mV/W
V
A
~ V
D
Sensitivity 2
R
P2
P
O
= 10W
29.1
36.4
43.6
mV/W V
E1
~ V
F2
Sensitivity 3
R
P3
P
O
= 10W
19.8
24.8
29.7
mV/W
V
RF
Cutoff Frequency 1
f
C1
P
O
= 10W (DC),
4W (AC), -3dB
100 - - MHz
V
A
~ V
D
Cutoff Frequency 2
f
C2
P
O
= 10 W (DC),
4W (AC), -3dB
100 - - MHz V
RF
Cutoff Frequency 3
f
C3
P
O
= 10 W (DC),
4W (AC), -3dB
20 - - MHz
V
E1
~ V
F2
Group Delay Variation 1
t
GD1
f = 1~50 MHz
-3
-
+3
ns
V
A
~ V
D
Group Delay Variation 2
t
GD1
f = 1~50 MHz
-3
-
+3
ns
V
RF
Output Noise Level 1
V
N1
f = 50 MHz
RBW = 30 kHz
VBW = 100Hz (Note 3)
- -80 - dBm
V
A
~ V
D
Output Noise Level 2
V
N2
f = 50 MHz
RBW = 30 kHz
VBW = 100Hz (Note 3)
- -70 - dBm V
RF
Note 3: Dark conditions, which implies no light incident on the photodiode.
CM1207 -- Integrated PD+TIA
5
Copyright 2001, Capella Microsystems, Inc.
Photodiode Characteristics 2
(Ta = 25C, V
CC
= 5V, V
S
=2.1V, R
L
=10K, C
L
= 10pf, =780 nm)
Description
Symbol
Condition
Min. Typ. Max. Unit Applies
to
Sensitivity 1
R
P1
P
O
= 10W
17.6
22
26.4
mV/W
V
A
~ V
D
Sensitivity 2
R
P2
P
O
= 10W
32
40
48
mV/W V
E1
~ V
F2
Sensitivity 3
R
P3
P
O
= 10W
21.7
27.2
32.6
mV/W
V
RF
Cutoff Frequency 1
f
C1
P
O
= 10W (DC),
4W (AC), -3dB
100 - - MHz
V
A
~ V
D
Cutoff Frequency 2
f
C2
P
O
= 10 W (DC),
4W (AC), -3dB
100 - - MHz V
RF
Cutoff Frequency 3
f
C3
P
O
= 10 W (DC),
4W (AC), -3dB
20 - - MHz
V
E1
~ V
F2
Group Delay Variation 1
t
GD1
f = 1~50 MHz
-3
-
+3
ns
V
A
~ V
D
Group Delay Variation 2
t
GD1
f = 1~50 MHz
-3
-
+3
ns
V
RF
Output Noise Level 1
V
N1
f = 50 MHz
RBW = 30 kHz
VBW = 100Hz (Note 3)
- -80 - dBm
V
A
~ V
D
Output Noise Level 2
V
N2
f = 50 MHz
RBW = 30 kHz
VBW = 100Hz (Note 3)
- -70 - dBm V
RF
Note 3: Dark conditions, which implies no light incident on the photodiode.
Vcc
ACC
Internal
Power-On
Reset
Tsu
Tacc
Under Voltage Lockout Threshold (Vuvc)
Figure 2: Automatic Calibration Timing Diagram
PDF 
ZIP