AT27C400
1
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A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
NC
NC
NC
NC
NC
NC
A17
A7
A6
A5
A4
A3
A2
A1
A16
BYTE/VPP
GND
015/A-1
I/O7
O14
O6
O13
O5
O12
O4
VCC
O11
O3
O10
O2
O9
O1
O8
O0
OE
GND
CE
A0
PDIP Top View
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A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
GND
OE
O0
O8
O1
O9
O2
O10
O3
O11
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE/VPP
GND
015/A-1
O7
O14
O6
O13
O5
O12
O4
VCC
SOIC (SOP)
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2
3
4
5
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7
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40
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32
31
30
29
28
27
26
25
24
23
22
21
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
GND
OE
O0
O8
O1
O9
O2
O10
O3
O11
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE/VPP
GND
015/A-1
O7
O14
O6
O13
O5
O12
O4
VCC
0844A-A7/97
Features
Fast Read Access Time - 70 ns
Word-wide or Byte-wide Configurable
4 Megabit Flash and Mask ROM Compatible
Low Power CMOS Operation
100
A Maximum Standby
50 mA Maximum Active at 5 MHz
Wide Selection of JEDEC Standard Packages
40-Lead 600 mil PDIP
40-Lead SOIC (SOP)
48-Lead TSOP (12 mm x 20 mm)
5V
10% Power Supply
High Reliability CMOS Technology
2,000V ESD Protection
200 mA Latchup Immunity
Rapid
TM
Programming Algorithm - 50
s/word (typical)
CMOS and TTL Compatible Inputs and Outputs
Integrated Product Identification Code
Commercial and Industrial Temperature Ranges
Description
The AT27C400 is a low-power, high-performance 4,194,304-bit one-time programma-
ble read only memory (OTP EPROM) organized as either 256K by 16 or 512K by 8
bits. It requires a single 5V power supply in normal read mode operation. Any word
can be accessed in less than 70 ns, eliminating the need for speed-reducing WAIT
states. The by-16 organization makes this part ideal for high-performance 16- and 32-
bit microprocessor systems.
4-Megabit
(256K x 16 or
512K x 8) OTP
EPROM
AT27C400
Preliminary
Pin Configurations
Note:
Both GND pins must be
connected.
Pin Name
Function
A0 - A17
Addresses
O0 - O15
Outputs
O15/A-1
Output/Address
BYTE/VPP
Byte Mode/
Program Supply
CE
Chip Enable
OE
Output Enable
NC
No Connect
TSOP
Type 1
AT27C400
2
Description (Continued)
The AT27C400 can be organized as either word-wide or
byte-wide. The organization is selected via the BYTE/V
PP
pin. When BYTE/V
PP
is asserted high (V
IH
), the word-wide
organization is selected and the O15/A-1 pin is used for
O15 data output. When BYTE/V
PP
is asserted low (V
IL
), the
byte-wide organization is selected and the O15/A-1 pin is
used for the address pin A-1. When the AT27C400 is logi-
cally regarded as x16 (word-wide), but read in the byte-
wide mode, then with A-1 = V
IL
the lower 8 bits of the 16-bit
word are selected and with A-1 = V
IH
the upper 8 bits of the
16-bit word are selected.
In read mode, the AT27C400 typically consumes 15 mA.
Standby mode supply current is typically less than 10
A
.
T h e A T 2 7 C 4 0 0 i s a v a i l a b l e i n i n d u s t r y s t a n d a r d
JEDEC-approved one-time programmable (OTP) PDIP,
SOIC (SOP), and TSOP packages. The device features
two-line control (CE, OE) to eliminate bus contention in
high-speed systems.
With high density 256K word or 512K byte storage capabil-
ity, the AT27C400 allows firmware to be stored reliably and
to be accessed by the system without the delays of mass
storage media.
Atmel's AT27C400 has additional features that ensure high
quality and efficient production use. The Rapid
TM
Program-
ming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming
time is typically only 50
s/word. The Integrated Product
Identification Code electronically identifies the device and
manufacturer. This feature is used by industry standard
programming equipment to select the proper programming
algorithms and voltages.
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions.
Unless accommodated by the system design, these tran-
sients may exceed data sheet limits, resulting in device
non-conformance. At a minimum, a 0.1
F high frequency,
low inherent inductance, ceramic capacitor should be uti-
lized for each device. This capacitor should be connected
between the V
CC
and Ground terminals of the device, as
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7
F bulk electrolytic capacitor should
be utilized, again connected between the V
CC
and Ground
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
AT27C400
3
Block Diagram
Absolute Maximum Ratings*
Temperature Under Bias ...................... -55
C to +125
C
*NOTICE:
Stresses beyond those listed under "Absolute Maxi-
mum Ratings" may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions beyond those indicated in the operational sec-
tions of this specification is not implied. Exposure to
absolute maximum rating conditions for extended
periods may affect device reliability.
Note:
1.
Minimum voltage is -0.6V dc which undershoot to -
2.0V for pulses of less than 20 ns. Maximum output
pin voltage is V
CC
+ 0.75V dc which may overshoot to
+7.0V for pulses of less than 20 ns.
Storage Temperature............................ -65
C to +150
C
Voltage on Any Pin with
Respect to Ground ..............................-2.0V to +7.0V
(1)
Voltage on A9 with
Respect to Ground ...........................-2.0V to +14.0V
(1)
V
PP
Supply Voltage with
Respect to Ground ............................-2.0V to +14.0V
(1)
Integrated UV Erase Dose...................7258 W sec/cm
2
Operating Modes
Notes:
1.
X can be V
IL
or V
IH
.
2.
Refer to the programming characteristics tables in this data sheet.
3.
V
H
= 12.0 0.5V.
4.
Two identifier words may be selected. All inputs are held low (V
IL
), except A9, which is set to V
H
, and A0, which is toggled
low (V
IL
) to select the Manufacturer's Identification word and high (V
IH
) to select the Device Code word.
5.
Standby V
CC
current (ISB) is specified with V
PP
= V
CC
. V
CC
> V
PP
will cause a slight increase in ISB.
Outputs
Mode/Pin
CE
OE
Ai
BYTE/V
PP
O
0
- O
7
O
8
- O
14
O
15
/A-1
Read Word-wide
V
IL
V
IL
X
(1)
V
IH
D
OUT
D
OUT
D
OUT
Read Byte-wide Upper
V
IL
V
IL
X
(1)
V
IL
D
OUT
High Z
V
IH
Read Byte-wide Lower
V
IL
V
IL
X
(1)
V
IL
D
OUT
High Z
V
IL
Output Disable
X
(1)
V
IH
X
(1)
X
High Z
Standby
V
IH
X
(1)
X
(1)
X
(5)
High Z
Rapid Program
(2)
V
IL
V
IH
Ai
V
PP
D
IN
PGM Verify
X
V
IL
Ai
V
PP
D
OUT
PGM Inhibit
V
IH
V
IH
X
(1)
V
PP
High Z
Product Identification
(4)
V
IL
V
IL
A9 = V
H
(3)
A0 = V
IH
or V
IL
A1 - A17 = V
IL
V
IH
Identificatio
n
Code
AT27C400
4
DC and AC Operating Conditions for Read Operation
DC and Operating Characteristics for Read Operation
Notes:
1.
V
CC
must be applied simultaneously or beofre V
PP
, and removed simultaneously or after V
PP
.
2.
V
PP
may be connected directly to V
CC
, except during programming. The supply current would then be the sum of I
CC
and
I
PP
.
AC Characteristics for Read Operation
Notes:
2, 3, 4, 5. See the AC Waveforms for Read Operation diagram.
AT27C400
-70
-90
-12
-15
Operating
Temperature
(Case)
Com.
0
C - 70
C
0
C - 70
C
0
C - 70
C
0
C - 70
C
Ind.
-40
C - 85
C
-40
C - 85
C
-40
C - 85
C
-40
C - 85
C
V
CC
Power Supply
5V
10%
5V
10%
5V
10%
5V
10%
Symbol
Parameter
Condition
Min
Max
Units
I
LI
Input Load Current
V
IN
= 0V to V
CC
1
A
I
LO
Output Leakage Current
V
OUT
= 0V to V
CC
5
A
I
PP1
(2)
V
PP
(1)
Read/Standby Current
V
PP
= V
CC
10
A
I
SB
V
CC
(1)
Standby Current
I
SB1
(CMOS)
CE = V
CC
0.3V
100
A
I
SB2
(TTL)
CE = 2.0 to V
CC
+ 0.5V
1
mA
V
CC
Active Current
f = 5 MHz, I
OUT
= 0 mA,
CE = V
IL
40
mA
V
IL
Input Low Voltage
-0.6
0.8
V
V
IH
Input High Voltage
2.0
V
CC
+ 0.5
V
V
OL
Output Low Voltage
I
OL
= 2.1 mA
0.4
V
V
OH
Output High Voltage
I
OH
= -400
A
2.4
V
AT27C400
-70
-90
-12
-15
Symbol
Parameter
Condition
Min
Max
Min
Max
Min
Max
Min
Max
Units
t
ACC
(2)
Address to
Output Delay
CE = OE
= V
IL
70
90
120
150
ns
t
CE
(2)
CE to Output Delay
OE = V
IL
70
90
120
150
ns
t
OE
(2)(3)
OE to Output Delay
CE = V
IL
30
35
40
50
ns
t
DF
(4)(5)
OE or CE High to Output Float,
whichever occurred first
20
20
30
35
ns
t
OH
(4)
Output Hold from Address,
CE or OE, whichever occurred first
5
5
5
5
ns
t
ST
BYTE High to Output Valid
70
90
120
150
ns
t
STD
BYTE Low to Output Transition
40
40
50
60
ns
= Advance Information
AT27C400
5
Byte-Wide Read Mode AC Waveforms
Note:
BYTE/V
PP
= V
IL
Word-Wide Read Mode AC Waveforms
Note:
BYTE/V
PP
= V
IH
BYTE Transition AC Waveforms
Notes:
1.
Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2.
OE maybe delayed up to t
CE
- t
OE
after the falling edge of CE without impact on t
CE
.
3.
OE maybe delayed up to t
ACC
- t
OE
after the address is valid without impact on t
ACC
.
4.
This parameter is only sampled and is not 100% tested.
5.
Output float is defined as the point when data is no longer driven.
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