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Электронный компонент: AX88172L

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ASIX ELECTRONICS CORPORATION
Frist Released Date: Dec/20/2001
2F, NO.13, Industry East Rd. II, Science-based Industrial Park, Hsin-Chu City, Taiwan, R.O.C.
TEL: 886-3-579-9500
FAX: 886-3-579-9558
http://www.asix.com.tw
AX88172 L
USB to Fast Ethernet/HomePNA Controller
USB to Fast Ethernet/HomePNA Controller
Document No.: AX172-4/ V1.4 / DEC, 20/02
Features
Single chip USB to 10/100Mbps Fast Ethernet and
1/10Mbps HomePNA and HomePlug Network
Controller
Compliant with USB specification 1.0 and 1.1 and
2.0
Full/High
Speed USB Device with bus power
capability
Support 4 endpoints on USB
IEEE 802.3u 100BASE-T, TX, and T4 Compatible
Embedded 7K*16 bit SRAM, 256*16 bit SRAM
and 8 FIFOs
Support both full-duplex or half-duplex operation
on Fast Ethernet
Provides a MII port for both Ethernet and
HomePNA/ HomePlug PHY interface
Supports suspended mode and remote wakeup
(link_up or magic packet
or external pin)
Optional PHY power down mode for power saving
Support (94c56/93c66) 256/512 bytes serial
EEPROM (used for saving USB Descriptors)
Support automatic loading of Ethernet ID, USB
Descriptors and Adapter Configuration from
EEPROM on power-on initialization
External PHY loop-back diagnostic capability
Small form factor with 80-pin LQFP package
Single 12MHz clock input, pure 3.3V operation
*IEEE is a registered trademark of the Institute of Electrical and
Electronic Engineers, Inc.
*All other trademarks and registered trademark are the property of their
respective holders.
Product description
The AX88172 USB to Fast Ethernet/HomePNA/HomePlug Controller is a high performance and highly integrated
Controller with embedded 7K*16 bit SRAM. The AX88172 contains a USB interface to host CPU and compliant with
USB Standard V1.0, V1.1 and V2.0. The AX88172 could be used for both 10M/100Mbps Fast Ethernet function based on
IEEE802.3 / IEEE802.3u LAN standard and 1M/10M HomePNA standard. The AX88172 supports media-independent
interface (MII) to simplify the design on implementing Fast Ethernet and HomePNA functions.

System Block Diagram





















Always contact ASIX for possible updates before starting a design.
This data sheet contains new products information. ASIX ELECTRONICS reserves the rights to modify product specification without notice. No
liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.
AX88172
10/100 Mbps Ethernet
PHY/TxRx
MAGNETIC
RJ45
USB I/F
EEPROM
1/10 Mbps
Home LAN PHY
MAGNETIC
RJ11
ASIX ELECTRONICS CORPORATION
2
AX88172 PRELIMINARY
CONTENTS
1.0 INTRODUCTION....................................................................................................................... 4
1.1 G
ENERAL
D
ESCRIPTION
:............................................................................................................. 4
1.2 AX88172 B
LOCK
D
IAGRAM
:...................................................................................................... 4
1.3 AX88172 P
IN
C
ONNECTION
D
IAGRAM
....................................................................................... 5
2.0 SIGNAL DESCRIPTION........................................................................................................... 6
3.0 EEPROM MEMORY MAPPING............................................................................................ 9
4.0 USB COMMANDS ................................................................................................................... 11
4.1 USB
STANDARD COMMANDS
.................................................................................................... 11
4.2 USB V
ENDOR
C
OMMANDS
....................................................................................................... 12
5.0 USB CONFIGURATION STRUCTURE .............................................................................. 14
5.1 USB C
ONFIGURATION
. ............................................................................................................. 14
5.2 USB I
NTERFACE
....................................................................................................................... 14
5.3 USB E
NDPOINTS
. ..................................................................................................................... 14
6.0 ELECTRICAL SPECIFICATION AND TIMINGS ............................................................ 15
6.1 A
BSOLUTE
M
AXIMUM
R
ATINGS
............................................................................................... 15
6.2 G
ENERAL
O
PERATION
C
ONDITIONS
.......................................................................................... 15
6.3 DC C
HARACTERISTICS
............................................................................................................. 15
6.4 A.C. T
IMING
C
HARACTERISTICS
............................................................................................... 16
6.4.1 12M_XIN ........................................................................................................................... 16
6.4.2 Reset Timing...................................................................................................................... 16
6.4.3 MII Timing......................................................................................................................... 17
6.4.4 STATION MANAGEMENT TIMING................................................................................. 18
6.4.5 SERIAL EEPROM TIMING .............................................................................................. 19
7.0 PACKAGE INFORMATION.................................................................................................. 20
APPENDIX A: SYSTEM APPLICATIONS ................................................................................ 21
A.1 USB
TO
F
AST
E
THERNET
C
ONVERTER
.................................................................................... 21
A.2 USB
TO
F
AST
E
THERNET AND
/
OR
H
OME
LAN C
OMBO SOLUTION
........................................... 21
DEMONSTRATION CIRCUIT A: AX88172 (ED2 VERSION) + ETHERNET PHY(8201L)
........................................................................................................................................................... 22
DEMONSTRATION CIRCUIT B: AX88172 (ED3 VERSION) + ETHERNET PHY
(8201LBL) ........................................................................................................................................ 24
REMARK: ....................................................................................................................................... 26
REVISIONS HISTORY ................................................................................................................. 27
ASIX ELECTRONICS CORPORATION
3
AX88172 PRELIMINARY

FIGURES
F
IG
1 AX88172 B
LOCK
D
IAGRAM
...................................................................................................................................4
F
IG
2 AX88172 P
IN
C
ONNECTION
D
IAGRAM
...................................................................................................................5


TABLES
T
AB
- 1 PIN
SIGNALS
..........................................................................................................................................................8
T
AB
- 2 EEPROM M
EMORY
M
APPING
..............................................................................................................................9
ASIX ELECTRONICS CORPORATION
4
AX88172 PRELIMINARY
1.0 Introduction
1.1 General Description:

The AX88172 USB to Fast Ethernet Controller is a high performance and highly integrated USB bus Ethernet Controller
with embedded 7K*16 bit SRAM. The AX88172 supported Full/High Speed USB Device with bus power capability. The
AX88172 implements both 10Mbps and 100Mbps Ethernet function based on IEEE802.3/ IEEE802.3u LAN standard.
The AX88172 supports media-independent interface (MII) to simplify the design on implementing Fast Ethernet and
HomePNA functions.

AX88172 uses 80-pin LQFP low profile package, 12MHz operation for USB and 25MHz operation for Ethernet, CMOS
process with pure 3.3V operation.




1.2 AX88172 Block Diagram:






















Fig 1 AX88172 Block Diagram

MAC
Core
Memory Arbiter
USB to
Ethernet
Bridge
USB Core and Interface
STA
SEEPROM
Loader I/F
DM/DP
MII /IF
MDC
MDIO
EECS
EECK
EEDI
EEDO
7K* 16
SRAM
ASIX ELECTRONICS CORPORATION
5
AX88172 PRELIMINARY
1.3 AX88172 Pin Connection Diagram
The AX88172 is housed in the 80-pin plastic light quad flat pack.









































Fig 2 AX88172 Pin Connection Diagram
AVDD
AVSS
AVSS
AVSS
DP
AVSS
DM
AVDD
EXTWAKEUPN
N
C
N
C
VDD
MDC
MDIO
N
C
VDD
TXD0
TXD1
TXD2
TXD3
TXEN
VDD
RXCLK
RXD0
RXD1
RXD2
RXD3
VDD
RXER
RXDV
TEST1
GPIO2
PHYRSTN
N
C
NC
LED
VDD
NC
NC
VSS
EECS
EEC
K
EEDI
EEDO
VSS
NC
NC
ANA_XIQ
VDD
CLKI
TESTMODE
RESET/RESET
VSS
VDD
PVDD
PVSS
VC
XOUT12M
XIN12M
80
79
78
77
76
75
74
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
73
72
71
70
69
68
67
66
65
ASIX
AX88172
17
18
19
20
37
38
39
40
44
43
42
41
64
63
62
61
R1
EPTEST
N
C
N
C
N
C
VSS
VSS
VDD
TEST0
GPIO0
GPIO1
VDD
RST_TYPE
NC
NC
NC
CRS
TXCLK
VBUS
COL
PHYRSTP
ED3