DC-DC CONVERTERS Non-isolated DDR/QDR Memory Bus Termination Module
1
NEW Product
File Name: pthxx060y.pdf Rev (02): 19 Dec 2005
2 YEAR WARRANTY
All specifications are typical at nominal input, V
REF
= 1.25 V, full load at 25 C
unless otherwise stated. C
in
, C
o1
and C
o2
= typical value
SPECIFICATIONS
V
TT
bus termination output (output the system V
REF
)
10 A output current
3.3 Vdc, 5 Vdc or 12 Vdc input voltage
DDR and QDR compatible
ON/OFF inhibit (for V
TT
standby)
Under-voltage lockout
Operating temperature range: -40 C to +85 C
Efficiencies up to 91%
Output overcurrent protection (non-latching, auto-reset)
Point-of-Load-Alliance (POLA) compatible
Available RoHS compliant
PTHxx060Y
3 . 3 / 5 / 1 2 V i n S i n g l e O u t p u t
The PTHxx060Y are a new series of non-isolated dc-dc converters designed specifically
for bus termination in DDR and QDR memory applications. Operating from either a
3.3 Vdc, 5 Vdc or 12 Vdc input, the modules generate a VTT output that will source or
sink up to 10 A of current to accurately track their VREF input. VTT is the required bus
termination supply voltage, and VREF is the reference voltage for the memory and chipset
bus receiver comparators. VREF is usually set to half the VDDQ power supply voltage.
The PTHxx060Y series employs an actively switched synchronous rectifier output to
provide state of the art stepdown switching conversion. The products are small in size
and are an ideal choice where space, performance and high efficiency are desired.
OUTPUT SPECIFICATIONS
Output current
(over V
REF
range)
10 A
(See Note 1)
Tracking range for V
REF
0.55-1.8 V
Tracking tolerance to V
REF
(V
TT
- V
REF
)
-10 mV to +10 mV
(over line, load
and temperature)
Ripple and noise
20 MHz bandwidth
20 mV pk-pk
Load transient response
30 s settling time
(See Note 4)
Overshoot/undershoot 25 mV typ.
Output capacitance:
Non-ceramic values
PTH03060Y 470 F typ., 5,500 F max.
(See Notes 4 and 5)
PTH05060Y 470 F typ., 5,500 F max.
PTH12060Y 940 F typ., 5,500 F max.
Ceramic values
PTH03060Y
200 F typ., 300 F max.
(See Note 4)
PTH05060Y
200 F typ., 300 F max.
PTH12060Y
400 F typ., 600 F max.
(See Note 6)
ESR (non-ceramic)
4 m
min
INPUT SPECIFICATIONS
Input current
No load
10 mA
Input voltage range
PTH03060Y
2.95-3.65 Vdc
PTH05060Y
4.5-5.5 Vdc
PTH12060Y
10.8-13.2 Vdc
Undervoltage lockout:
PTH03060Y
Vin increasing
2.45 V typ., 2.80 V max.
Vin decreasing
2.20 V min., 2.40 V typ.
PTH05060Y
Vin increasing
4.30 V typ., 4.45 V max.
Vin decreasing
3.40 V min., 3.70 V typ.
PTH12060Y
Vin increasing
9.5 V typ., 10.4 V max.
Vin decreasing
8.80 V min., 9.0 V typ.
INPUT SPECIFICATIONS CONTD.
Input capacitance
PTH03060Y and PTH05060Y
330 F
(See Note 3)
PTH12060Y
560 F
Remote ON/OFF
Positive logic
GENERAL SPECIFICATIONS
Efficiency
PTH03060Y
86% typ.
(Io = 8 A)
PTH05060Y
86% typ.
PTH12060Y
83% typ.
Insulation voltage
Non-isolated
Switching frequency
PTH03060Y
550-650 kHz
PTH05060Y
550-650 kHz
PTH12060Y
200-300 kHz
Approvals and
EN60950
standards
UL/cUL60950
Material flammability
UL94V-0
Dimensions
(L x W x H)
25.27 x 15.75 x 9.00 mm
0.995 x 0.620 x 0.354 in
Weight
3.7 g (0.13 oz)
MTBF
Telcordia SR-332
6,000,000 hours
ENVIRONMENTAL SPECIFICATIONS
Thermal performance
Operating ambient,
-40 C to +85 C
(See Note 2)
temperature
Non-operating
-40 C to +125 C
MSL (`Z' suffix only)
JEDEC J-STD-020C
Level 3
PROTECTION
Overcurrent threshold
All models
20 A typ.
(auto reset)
File Name: pthxx060y.pdf Rev (02): 19 Dec 2005
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
DC-DC CONVERTERS Non-isolated DDR/QDR Memory Bus Termination Module
2
NEW Product
N
No
otte
es
s
1
Rating is conditional on the module being soldered to a 4 layer PCB with
1 oz. copper. See the SOA curves or contact the factory for appropriate
derating.
2
This control pin has an internal pull-up to the input voltage Vin. If it is left
open-circuit the module will operate when input power is applied. A small
low-leakage (<100 nA) MOSFET is recommended for control. For further
information, consult Application Note 179.
3
An input capacitor is required for proper operation. The capacitor must
be rated for a minimum of 500 mA rms (1000 mA for 12 V input) of ripple
current. For further information, consult Application Note 179 on
capacitor selection.
4
The typical value of external output capacitance value ensures that VTT
meets the specified transient performance requirements for the memory
bus terminations. Lower values of capacitance may be possible when the
measured peak change in output current is consistently less than 3 A.
Test conditions were 15 A/s load step, -1.5 A to +1.5 A.
PTHxx060Y
3 . 3 / 5 / 1 2 V i n S i n g l e O u t p u t
OUTPUT
INPUT
VTT
OUTPUT
OUTPUT
EFFICIENCY
MODEL
POWER
VOLTAGE
RANGE
CURRENT
CURRENT
(TYP.)
NUMBER
(8,9)
(MAX.)
(MIN.)
(MAX.)
18 W
2.95-3.65 Vdc
0.55-1.8 Vdc
0 A
10 A
86%
PTH03060Y
18 W
4.50-5.50 Vdc
0.55-1.8 Vdc
0 A
10 A
86%
PTH05060Y
18 W
10.8-13.2 Vdc
0.55-1.8 Vdc
0 A
10 A
83%
PTH12060Y
5
This is the calculated maximum. The minimum ESR limitation will often
result in a lower value. Consult Application Note 179 for further details.
6
This is the typcial ESR for all the electrolytic (non-ceramic) output
capacitance. Use 7 m
as the minimum when using max-ESR values to
calculate.
7
Tape and reel packaging only available on the surface-mount versions.
8
To order Pb-free (RoHS compatible) surface-mount parts replace the
mounting option `S' with `Z', e.g. PTHxx060YAZ. To order Pb-free (RoHS
compatible) through-hole parts replace the mounting option `H' with `D',
e.g. PTHxx060YAD.
9
NOTICE: Some models do not support all options. Please contact your
local Artesyn representative or use the on-line model number search tool at
http://www.artesyn.com/powergroup/products.htm to find a suitable
alternative.
P T H 0 5 0 6 0 Y A S T
Part Number System with Options
Product Family
Point of Load Alliance
Compatible
Mounting Option
(8)
D = Horizontal Through-Hole (Matte Sn)
H = Horizontal Through-Hole (Sn/Pb)
S = Surface-Mount (63/37 Sn/Pb
pin solder material)
Z = Surface-Mount (96.5/3.0/0.5 Sn/Ag/Cu
pin solder material)
Output Current
06 = 10 A
Packaging Options
No Suffix = Trays
T = Tape and Reel
(7)
Input Voltage
03 = 3.3 V, 05 = 5 V
and 12 = 12 V
Mechanical Package
Always 0
Pin Option
A = Through-Hole Std. Pin Length (0.140")
A = Surface-Mount Tin/Lead Solder Ball
Output Voltage Code
Y = DDR Module
International Safety Standard Approvals
UL/cUL CAN/CSA-C22.2 No. 60950
File No. E174104
TV Product Service (EN60950) Certificate No. B 04 06 38572 044
CB Report and Certificate to IEC60950, Certificate No. US/8292/UL
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
DC-DC CONVERTERS Non-isolated DDR/QDR Memory Bus Termination Module
3
NEW Product
File Name: pthxx060y.pdf Rev (02): 19 Dec 2005
PTHxx060Y
3 . 3 / 5 / 1 2 V i n S i n g l e O u t p u t
E
F
F
I
C
I
E
N
C
Y
(
%
)
OUTPUT CURRENT (A)
50
60
70
80
90
100
0
2
4
6
8
10
3.3V
5.0V
12.0V
Vin
Nat conv
100 LFM
200 LFM
0
2
4
6
8
10
0
10
20
30
40
50
60
70
80
O
U
T
P
U
T
C
U
R
R
E
N
T
(
A
)
AMBIENT TEMPERATURE (C)
12
Figure 3 - Efficiency vs Load Current
V
REF
= 1.25 V (See Note B)
Figure 1 - Safe Operating Area
Vin = 5.0 V, V
REF
= 1.25 V, Iout = 10 A (See Note A)
N
No
otte
es
s
A
The SOA curves represent the conditions at which internal components
are within the Artesyn derating guidelines.
B
Characteristic data has been developed from actual products tested at
25 C. This data is considered typical data for the converter.
8
9
10
Q
1
BSS138
(Optional)
1 k
1 k
1 %
1 %
GND
Vin
Standby
V
DDQ
C
in
(Required)
1
2
+
PTHxx060Y
(Top View)
4
5
3
6
7
SSTL-2
Data/
Address/
Bus
V
t
t
T
e
r
m
i
n
a
t
i
o
n
I
s
l
a
n
d
Co
1
Low-ESR
(Required)
Co
2
Ceramic
(Optional)
Co
n
hf-Ceramic
V
tt
V
REF
+
Figure 4 - Standard Application
Nat conv
100 LFM
200 LFM
0
2
4
10
0
10
20
30
40
50
60
70
80
6
8
O
U
T
P
U
T
C
U
R
R
E
N
T
(
A
)
AMBIENT TEMPERATURE (C)
14
Figure 2 - Safe Operating Area
Vin = 12 V, V
REF
= 1.25 V, Iout = 10 A (See Note A)
File Name:
Please consult our website for the following items:
Application Note
www.artesyn.com
Datasheet Artesyn Technologies 2005
The information and specifications contained in this datasheet are believed to be correct at time of publication. However, Artesyn Technologies accepts no responsibility for consequences arising
from printing errors or inaccuracies. The information and specifications contained or described herein are subject to change in any manner at any time without notice. No rights under any patent
accompany the sale of any such product(s) or information contained herein.
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
DC-DC CONVERTERS Non-isolated DDR/QDR Memory Bus Termination Module
4
NEW Product
Dimensions in Inches (mm)
Tolerances (unless otherwise specified)
2 Places
0.030 (
0.76)
3 Places
0.010 (
0.25)
0.140
(3.55)
0.354 (9.00)
MAX.
Host Board
TOP VIEW
SIDE VIEW
0.995 (25.27)
0.620
6
7
3
5
4
10
9
8
1
2
0.040 (1.02)
5 Places.
(15.75)
0.125 (3.18)
0.125 (3.18)
(6.35)
0.250
0.060
(1.52)
0.500
(12.70)
(1.52)
0.060
0.375
(9.52)
0.070 (1.78)
(Standoff Shoulder)
Lowest Component
0.010 min. (0.25)
Bottom side Clearance
Dimensions in Inches (mm)
Tolerances (unless otherwise specified)
2 Places
0.030 (
0.76)
3 Places
0.010 (
0.25)
SIDE VIEW
Solder Ball
0.040 (1.02)
10 Places
TOP VIEW
0.995 (25.27)
0.620
6
7
3
5
4
10
9
8
1
2
(15.75)
0.125 (3.18)
0.125 (3.18)
(6.35)
0.250
0.060
(1.52)
0.500
(12.70)
(1.52)
0.060
0.375
(9.52)
*After solder reflow
on customer board
0.354 (9.00)
max.*
Host Board
Lowest Component
0.010 min. (0.25)
Bottom side Clearance
Figure 5 - Plated Through-Hole Mechanical Drawing
Figure 6 - Surface-Mount Mechanical Drawing
PTHxx060Y
3 . 3 / 5 / 1 2 V i n S i n g l e O u t p u t
*Denotes negative logic:
Open = Normal operation
Ground = Function active
PIN CONNECTIONS
PIN NO.
FUNCTION
1
Ground
2
Vin
3
Inhibit*
4
N/C
5
Vo sense
6
V
TT
7
Ground
8
V
REF
9
N/C
10
N/C
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