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Электронный компонент: APX6219KI-TRL

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Copyright
ANPEC Electronics Corp.
Rev. A.4 - Apr., 2005
APX6219
www.anpec.com.tw
1
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.


Able to Drive Both Windings of Bipolar Stepper
Motor


Up to 750 mA Continuous Output Current for
Each Winding


Up to 28V
Output Sustaining Voltage


Internal PWM Current Control


Built-in Protection Diode


Low Output Saturation Voltage


Internal Thermal Shutdown
Lead Free Available (RoHS Compliant)
Features
General Description
The APX6219 is designed to drive both winding of a
two-phase bipolar stepper motor or bidirectionally
control 2 DC motors. APX6219 includes two H-
bridges capable of continuous output current of 750
mA with peak start up to 1A and operating voltages
up to 28V. Motor winding current can be controlled
by the internal fixed-frequency, pulse-width modulated
(PWM), current-control circuitry. Wide range current
control is controlled by means of two logic inputs with
a external reference voltage for each bridge. The peak
load current limit is set by the user's selection of a
reference voltage and current-sensing resistor. Two
logic-level select output current limits of 0%,33%,
67%, or 100% of the maximum level. A phase input
to each bridge determines load current direction. A
thermal shutdown protection circuit disables the out-
puts if the chip temperature over the safe operation
limit. The APX6219 come in SOP-24 package.
Applications
Scanner
Stepping Motor Control
Thermal Printer
Pin Configuration
SOP-24 (Top View)
OUT1A
OUT2A
SENSE2
GND
COMP.INPUT1
l01
GND
OUT2B
COMP.INPUT2
l02
I12
OUT1B
GND
l11
PHASE1
RC1
1
2
3
4
5
6
7
8
12
11
V
BB
(LOAD SUPPLY)
10
9
16
15
14
13
17
18
19
20
24
23
22
21
V
CC
(LOGIC SUPPLY)
VREF1
SENSE1
GND
PHASE2
VREF2
RC2
PWM Stepper Motor Driver
Copyright
ANPEC Electronics Corp.
Rev. A.4 - Apr., 2005
APX6219
www.anpec.com.tw
2
A P X 6 2 1 9
P a c k a g e C o d e
K : S O P - 2 4
T e m p . R a n g e
I : -4 0 C to 8 5 C
H a n d lin g C o d e
T U : T u b e T R : T a p e & R e e l
L e a d F re e C o d e
L : L e a d F re e B la n k : O rig in a l D e v ic e
H a n d lin g C o d e
T e m p . R a n g e
P a c k a g e C o d e
A P X 6 2 1 9 K :
A P X 6 2 1 9
X X X X X
X X X X X - D a t e C o d e
L e a d F re e C o d e
Pin Description
PIN
NO. Name
I/O Description
1,2 OUTPUT
A
O
H- bridge Output connection. The output stage is a "H" bridge formed by four
transistors and four-protection diode for switching applications.
3,23
Sense
Resistor
O
Connection to lower emitters of output stage for insertion of current sensor
resistor to check the peak value of output current
4,22
Comparator
Input
I
The voltage across the sense resistor is feedback to this input through the
low pass filter R
C
C
C
. The higher power transistors are disabled when the
sense voltage exceeds the reference voltage of selected comparator. The
current decays for a time set by R
T
C
T
when this happen
5,21
OUTPUT B
O See pins 1,2
6,7,18,19 Ground
Ground
connection
These pins are logic inputs which select the outputs of the comparators to set
the output current level. Current also depends on the sensing resistor and
reference voltage.
I0 I1
Current
level
H H
L H
H L
8,9 I02/I12
I
L L
No current
Low current 1/3 I
O
max
Medium current 2/3 I
O
max
Maximum current I
O
max
20,17
I01/I11
I
See pins 8,9; current level control for channel2
10,16 PHASE I
This TTL-compatible logic input sets the current flow direction through load.
A schmitt trigger with this input provides the noise immunity and a delay
circuit prevents output stage short circuits during switching
11,15
Reference
Voltage
I
A voltage apply this pin sets the input of a comparator to control the output
current
12,14 R
T
C
T
O
A
R
T
C
T
connection to this pin sets the off time of higher power transistor
13 V
CC
Logic supply voltage
24 V
BB
Load supply voltage
Ordering and Marking Information
Notes: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte in plate termi-
nation finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering operations.
ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C for MSL classifica-
tion at lead-free peak reflow temperature.
Copyright
ANPEC Electronics Corp.
Rev. A.4 - Apr., 2005
APX6219
www.anpec.com.tw
3
Block Diagram
LOGIC
SURRENT
SELECT
POWER
BRIDGE
1
LOGIC
SURRENT
SELECT
THERMAL
SHUTDOWN
POWER
BRIDGE
2
(22)
COMPARATOR
INPUT1
(14)
RC1
(13)
)
LOGIC
SUPPLY
(24)
LOAD
SUPPLY
(1)
OUT1A
(21)
OUT1B
WINDING1
(2)
OUT2A
(5)
OUT2B
WINDING2
(20)
I01
]
17
^
I11
(16)
PHASE1
(15)
VREF1
(11)
VREF2
(8)
I02
(9)
I12
(10)
PHASE2
(6,7,18,19)
GND
(4)
COMPARATOR
INPUT2
(12)
RC2
(23)
SENSE1
R
SENSE1
(3)
SENSE2
R
SENSE2
Absolute Maximum Ratings
Symbol Parameter Rating
Unit
V
BB
Load
Supply
Voltage
30
V
I
O
Output Current (Peak)
1
A
I
O
Output Current (Continuous)
750
mA
V
CC
Logic
Supply
Voltage
7
V
V
IN
Logic
Input
Voltage
-0.3 to
V
CC
+0.3
V
V
SENSE
Driver Output Sense Voltage
1.5
V
R
TH,JA
Thermal Resistance Junction to Ambient*
SOP-24
75
C/W
R
TH,JC
Thermal Resistance Junction to Case
SOP-24
15
C/W
P
D
Power
Dissipation
Internally
Limited
W
T
J
Junction Temperature
0 to 150
C
T
OP
Operating Temperature Range
0 to 70
C
T
STG
Storage Temperature Range
-65 to +150
C
T
L
Lead Temperature (Soldering, 10 second)
260
C
(*) With minimized copper area.
Copyright
ANPEC Electronics Corp.
Rev. A.4 - Apr., 2005
APX6219
www.anpec.com.tw
4
Electrical Characteristics
APX6219
Symbol Parameter
Test
Conditions
Min. Typ. Max.
Unit
Output drivers (OUTA or OUTB)
V
BB
Motor
Supply
Voltage
10 28 V
I
LEAK
Output
Leakage
Current
V
OUT
=V
BB
V
OUT
=0
<1
<-1
50
-50
A
V
CE
(sat) Output
Saturation
Voltage
Sink driver, I
OUT
=+500mA
Sink driver, I
OUT
=+750mA
Source driver, I
OUT
=-500mA
Source driver, I
OUT
=-750mA
0.4
0.8
1.1
1.4
0.7
1.1
1.4
1.7
V
I
R
Clamp Diode Leakage Current
V
R
=28V
<1
50
A
V
F
Clamp Diode Forward Voltage
Sink diode
Source diode I
F
=750mA
1.6
1.6
2
2
V
I
BB
(on)
Driver Supply Current
Both bridges ON, no load
14
25
mA
I
BB
(off)
Driver Supply Current
Both bridges OFF
2
10
mA
Control logic
V
IH
Voltage
Input
All
inputs
2.4
V
V
IL
Voltage
Input
All
inputs
0.8 V
I
IH
Input
Current
V
IN
=2.4V
<1
20
A
I
IL
Input
Current
V
IN
=0.8V
-5
-50
A
V
REF
Reference
Voltage
1.5 7.5 V
I
CC
(on) Logic Supply Current
I0=I1=0.8V, no load
47
57
mA
I
CC
(off) Logic Supply Current
I0=I1=2.4V, no load
8
14
mA
V
REF
/V
SENSE
Current Limit Threshold (at trip
point)
I0=I1=0.8V
I0=2.4V,I1=0.8V
I0=0.8V,I1=2.4V
9.5
13.5
25.5
10
15
30
10.5
16.5
34.5
T
OFF
Cutoff
Time
R
T
=56K
, C
T
=820pF
45
s
T
D
Turn
off
Delay
2
s
Protection
Over Temperature Shutdown
150
C
OTS
Over Temperature Shutdown
Hystersis
Hystersis
20
C
Unless otherwise noted these specifications apply over full temperature, V
BB
=28V, V
CC
=4.75 to 5.25V, V
REF
=5V,
T
J
=0 to 125
C . Typical values refer to T
J
=25
C .
Copyright
ANPEC Electronics Corp.
Rev. A.4 - Apr., 2005
APX6219
www.anpec.com.tw
5
PWM Output Current Waveform
V
P H A S E
I
T R IP
=V
R E F
/10 R
S
t
d
t
off
I
T R IP
-
+
0
I
O U T
Rs
m otor
V
B B
B ridge on
S ource off
A ll off
Load Current Paths
Copyright
ANPEC Electronics Corp.
Rev. A.4 - Apr., 2005
APX6219
www.anpec.com.tw
6
I01
I11
Phase1
Motor2 current
167 mA
1 2 3 4 5 6 7 8
x
x
Half-step motor drive
Full-step motor drive
Stand-by
-333 mA
-500mA
1 2 3 4 5 6 7 8
500mA
Phase2
I02
I12
Motor1 Current
-167 mA
-333 mA
-500mA
500mA
333 mA
333 mA
x
x
I01
I11
Phase1
Motor2 current
167 mA
1 2 3 4 5 6 7 8
x
x
Half-step motor drive
Full-step motor drive
Stand-by
-333 mA
-500mA
1 2 3 4 5 6 7 8
500mA
Phase2
I02
I12
Motor1 Current
-167 mA
-333 mA
-500mA
500mA
333 mA
333 mA
x
x
Principle Operating Sequence
Copyright
ANPEC Electronics Corp.
Rev. A.4 - Apr., 2005
APX6219
www.anpec.com.tw
7
1
2
3
1 2
4
5
6
7
8
9
1 0
1 1
2 4
2 3
2 2
1 3
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1 4
R
C
R
S
C
C
R
C
R
S
C
C
R
T
C
T
R
T
C
T
V
C C
V
R E F 1
V
B B
+
S T E P P E R
M O T O R
V
R E F 2
F o m
P
F o m
P
R
T
= 5 6 K
, C
T
= 8 2 0 p F
R
C
= 1 K
, C
C
= 8 2 0 p F
R
S
= 1
0 .1
F
0 .1
F
0 .1
F
1 0 0
F
Typical Application Circuit
V
RE F
I0
I1
1 0
C M P
-
+
R
s
1
O ne
sho t
R
T
5 6 k
C
T
8 2 0 p f
O U TA
m o to r
S e nse
S o urce
D isa b le
O U TB
2 0 k
4 0 k
1 0 k
V
B B
R
C
C
C
C O M P IN
%
"
#
"
!
RC
V
RE F
I0
I1
1 0
C M P
-
+
R
s
1
O ne
sho t
R
T
5 6 k
C
T
8 2 0 p f
O U TA
m o to r
S e nse
S o urce
D isa b le
O U TB
2 0 k
4 0 k
1 0 k
V
B B
R
C
C
C
C O M P IN
%
"
#
"
!
RC
H
L
L
L
H
H
OU TB
OU TA
P has e
H
L
L
L
H
H
OU TB
OU TA
P has e
True Table
PWM Current-Control Circuitry
Copyright
ANPEC Electronics Corp.
Rev. A.4 - Apr., 2005
APX6219
www.anpec.com.tw
8
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
4
4.5
5
5.5
6
0
0.5
1
1.5
2
2.5
4
4.5
5
5.5
6
Typical Characteristics
All Bridge Enable
Time ( 0.1ms/div)
I0
I1
I
L
(0~300mA)
V
OUT1A
(1V/div)
All Bridge Disable
Time ( 0.1ms/div)
I0
I1
I
L
(0~300mA)
V
OUT1A
(1V/div)
I0, I1 Threshold Voltage
V
CC
(V)
I0
, I1(V)
I
IO
=0
A
V
BB
=12V
PHASE Pin Threshold Voltage
V
CC
(V)
PHASE
(V)
V
PHASE+
V
PHASE-
I
PHASE+=
I
PHASE-
=0
A
V
BB
=12V
Copyright
ANPEC Electronics Corp.
Rev. A.4 - Apr., 2005
APX6219
www.anpec.com.tw
9
0
100
200
300
400
500
600
700
800
900
0
0.25
0.5
0.75
1
1.25
1.5
1.75
20
30
40
50
60
70
80
90
100
110
0
10
20
30
40
50
60
70
80
90 100
Typical Characteristics
V
CE
(V)
I
E
(mA)
Sink
Output Saturation Voltage
Source
R
T
C
T
vs. Cut Off Time
R
T
(k
)
Cut Off Time(
s)
C
T
=470pF
820pF
1000pF
Operating Waveform1
Time (1ms/div)
Time (0.1ms/div)
V
PHASE1
(5V/div)
I
L
(500mA~-500mA)
V
OUT1A
(10V/div)
R
T
=56k
,C
T
=820pF,
R
C
=1k
,
C
C
=820pF
V
OUT1B
(10V/div)
Operating Waveform2
I
L
(300mA~-300mA)
V
COMP INPUT1
V
RC1
(1.6V~4.2V)
V
OUT1A
(10A/div)
R
T
=56k
,C
T
=820pF,
R
C
=1k
,
C
C
=820pF
V
CC
=5V
V
BB
=12V
Copyright
ANPEC Electronics Corp.
Rev. A.4 - Apr., 2005
APX6219
www.anpec.com.tw
10
Typical Characteristics
Time (5ms/div)
V
RC1
(1.6V~4.2V)
I
L
(300mA~-300mA)
V
OUT1A
(10V/div)
V
OUT1B
(10V/div)
Half Stage Operation
Copyright
ANPEC Electronics Corp.
Rev. A.4 - Apr., 2005
APX6219
www.anpec.com.tw
11
Application Information
PWM Current Control
The APX6219 dual bridge is designed to drive both
windings of a bipolar stepper motor. Output current is
sensed and controlled independently in each bridge
by an external sense resistor (R
S
), internal comparator,
and monostable multivibrator. When the bridge is
turned on, current increases in the motor winding and
it is sensed by the external sense resistor until the
sense voltage (V
COMPIN
) reaches the level set at the
comparator's input:
I
TRIP
= V
REF
/10 R
S
The comparator then triggers the monostable which
turns off the source driver of the bridge. The actual
load current peak will be slightly higher than the trip
point (especially for low-inductance loads) because of
the internal logic and switching delays. This delay (T
D
)
is typically 2
s. After turn-off, the motor current
decays, going through the ground-clamp diode and
sink transistor (source off). The source driver's off time
is determined by the external RC timing components,
where T
OFF
= R
T
C
T
within the range of 30k
to 100k
and 470pF to 1000pF.When VRC drop to certain
voltage, the source driver will be re-enabled automati-
cally (bridge on), the winding current is again limited
at the desired level.
Loads with high V
BB
, low L , high-frequency and low
current will may result in high turn-on current peaks.
This peak (appearing across R
S
) will attempt to trip
the comparator, resulting in erroneous current control
or high-frequency oscillations. An external R
C
C
C
time
delay should be used to form low pass filter to reduce
noise to avoid the comparator's fault operation. The
locations of R
C
, C
C
, R
C
components should be as close
to the APX6219 as possible.
Logic Control Of Output Current
Two logic level inputs (l0 and I1) allow digital selection
of the motor winding current at 100%, 67%, 33%, or
0% of the maximum level per the table. The 0% out-
put current condition turns off all drivers in the bridge
and can be used as an OUTPUT Disable/Enable
function.
During half-step operations, the l0 and l1 allow the
P
to control the motor at a constant torque between all
positions in an eight-step sequence. This is accom-
plished by digitally selecting 67% drive current when
two phases are on. When all drivers are turn off will
make rapid current decay when phases be changed.
This helps to ensure proper motor operation at high
step rates.
The logic control inputs can also be used to select a
reduced current level (and reduced power dissipation)
for `hold' conditions and/or increased current (and avail-
able torque) for start-up conditions.
General
The PHASE input to each bridge determines the di-
rection motor winding current flows. An internally gen-
erated deadtime (approximately 2
s) prevents shoot
through that can occur when switching the PHASE
input. Thermal protection circuitry turns off all drivers
when the junction temperature reaches +150C. It is
only intended to protect the device from failures due
to excessive junction temperature and should not im-
ply that output short circuits are permitted. The out-
put drivers are re-enabled when the junction tempera-
ture cools to +130C.
The APX6219 output drivers are optimized for low out-
put saturation, less than 2V (source plus sink) at load-
ing 500mA.Under normal operating conditions, this
allows continuous operation of both bridges simulta-
neously at 750mA (such as Typical Application).
Copyright
ANPEC Electronics Corp.
Rev. A.4 - Apr., 2005
APX6219
www.anpec.com.tw
12
Package Information
SO 300mil ( Reference JEDEC Registration MS-013)
Millimeters
Variations- D
Inches
Variations- D
Dim
Min.
Max.
Variations
Min.
Max.
Dim
Min.
Max.
Variations
Min.
Max.
A
2.35
2.65
SO-16
10.10
10.50
A
0.093
0.1043
SO-16
0.398
0.413
A1
0.10
0.30
SO-18
11.35
11.76
A1
0.004
0.0120
SO-18
0.447
0.463
B
0.33
0.51
SO-20
12.60
13
B
0.013
0.020
SO-20
0.496
0.512
D
See variations
SO-24
15.20
15.60
D
See variations
SO-24
0.599
0.614
E
7.40
7.60
SO-28
17.70
18.11
E
0.2914
0.2992
SO-28
0.697
0.713
e
1.27BSC
SO-14
8.80
9.20
e
0.050BSC
SO-14
0.347
0.362
H
10
10.65
H
0.394
0.419
L
0.40
1.27
L
0.016
0.050
N
See variations
N
See variations
1
0
8
1
0
8
N
1 2 3
E
H
D
L
G A U G E
P L A N E
1
e
B
A 1
A
Copyright
ANPEC Electronics Corp.
Rev. A.4 - Apr., 2005
APX6219
www.anpec.com.tw
13
t 25 C to P ea k
tp
R am p-up
t
L
R am p-do w n
ts
P reheat
T sm ax
T sm in
T
L
T
P
25
Tem
p
e
r
at
ur
e
T im e
C ritical Z one
T
L
to T
P
Physical Specifications
Terminal Material
Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn
Lead Solderability
Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition
(IR/Convection or VPR Reflow)
Classificatin Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
Average ramp-up rate
(T
L
to T
P
)
3
C/second max.
3
C/second max.
Preheat
-
Temperature Min (Tsmin)
-
Temperature Max (Tsmax)
-
Time (min to max) (ts)
100
C
150
C
60-120 seconds
150
C
200
C
60-180 seconds
Time maintained above:
-
Temperature (T
L
)
-
Time (t
L
)
183
C
60-150 seconds
217
C
60-150 seconds
Peak/Classificatioon Temperature (Tp)
See table 1
See table 2
Time within 5
C of actual
Peak Temperature (tp)
10-30 seconds
20-40 seconds
Ramp-down Rate
6
C/second max.
6
C/second max.
Time 25
C to Peak Temperature
6 minutes max.
8 minutes max.
Notes: All temperatures refer to topside of the package .Measured on the body surface.
Copyright
ANPEC Electronics Corp.
Rev. A.4 - Apr., 2005
APX6219
www.anpec.com.tw
14
Reliability test program
Test item
Method
Description
SOLDERABILITY
MIL-STD-883D-2003
245
C , 5 SEC
HOLT
MIL-STD-883D-1005.7
1000 Hrs Bias @ 125
C
PCT
JESD-22-B, A102
168 Hrs, 100 % RH , 121
C
TST
MIL-STD-883D-1011.9
-65
C ~ 150
C, 200 Cycles
ESD
MIL-STD-883D-3015.7
VHBM > 2KV, VMM > 200V
Latch-Up
JESD 78
10ms , I
tr
> 100mA
Carrier Tape
t
A o
E
W
P o
P
K o
B o
D 1
D
F
P 1
Table 2. Pb-free Process Package Classification Reflow Tem peratures
Package Thickness
Volum e m m
3
<350
Volum e m m
3
350-2000
Volum e m m
3
>2000
<1.6 m m
260 +0
C* 260
+0
C* 260
+0
C*
1.6 m m 2.5 m m
260 +0
C* 250
+0
C* 245
+0
C*
2.5 m m
250 +0
C* 245
+0
C* 245
+0
C*
*Tolerance: The device m anufacturer/supplier shall assure process com patibility up to and
including the stated classification tem perature (this m eans Peak reflow tem perature +0
C.
For exam ple 260
C+0
C) at the rated M SL level.
Table 1. SnPb Entectic Process Package Peak Reflow Tem peratures
Package Thickness
Volum e m m
3
<350
Volum e m m
3
350
<2.5 m m
240 +0/-5
C 225
+0/-5
C
2.5 m m
225 +0/-5
C 225
+0/-5
C
Classificatin Reflow Profiles(Cont.)
Copyright
ANPEC Electronics Corp.
Rev. A.4 - Apr., 2005
APX6219
www.anpec.com.tw
15
Application
Carrier Width
Cover Tape Width
Devices Per Reel
SOP- 24
24 21.3
1000
Application
A
B
C
J
T1
T2
W
P
E
330
1
62
1.5
12.75
0.15
2
0.6 24.4
0.2 2
0.2
24
0.3 12
0.1
.75
0.1
F
D
D1
Po
P1
Ao
Bo
Ko
t
SOP- 24
11.5
0.1 1.55 +0.1 1.5+ 0.25 4.0
0.1 2.0
0.1 10.9
0.1 15.9
0.1 3.1
0.1 .35
0.05
(mm)
Anpec Electronics Corp.
Head Office :
5F, No. 2 Li-Hsin Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
7F, No. 137, Lane 235, Pac Chiao Rd.,
Hsin Tien City, Taipei Hsien, Taiwan, R. O. C.
Tel : 886-2-89191368
Fax : 886-2-89191369
Customer Service
Cover Tape Dimensions
Carrier Tape(Cont.)
A
J
B
T 2
T 1
C