Copyright
ANPEC Electronics Corp.
Rev.A.1 - Dec., 2001
APW7055
www.anpec.com.tw
1
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Features
Operates from 5V input supply
2 Regulated Voltage are provided
-
Standard Buck Switching Power for VMEM
(2.5V)
-
Linear Controller with Source-Sink Regula
tion for VTT(1.25V)
Simple Single-Loop Control Design
-
Voltage-Mode PWM Control
Excellent Output Voltage Regulation
-
VMEM Output : V
MEM
1.5% Over Tem-per
ature
-
VTT Output : 1/2 VIN 25mV Over Tempera-
ture
Fast Transient Response
-
Built-in Feedback Compensation
-
Full 0% to 100% Duty Ratio
Over-Voltage and Over-Current Fault Monitors
Constant Frequency Operation(200kHz)
16 pins, SSOP Package
Applications
M/B DDR Power Regulation
AGP/PCI Graphics Power Regulation
SSTL-2 Termination
General Description
The APW7055 provides the power control and protec-
tions for two output voltages on M/B DDR applications.
It integrates one PWM controller , one source-sink
linear controller(LC) for DDR source-sink purpose, as
well as the monitor and protection functions into a
single package. The PWM controller supplies the
VMEM(2.5V) with a standard buck converter. The
source-sink linear controller regulates VTT(1.25V)
power for DDR Termination.
Additional built-in over-voltage protection (OVP) will
be started when the VMEM output is above 115% of
the internal DAC setting(V
DAC
) . OVP function will shut-
down the upper MOSFET and disable all output volt-
age . The PWM controller's over-current function moni-
tors the output current by sensing the voltage drop
across the upper MOSFET`s r
DS(ON)
, eliminating the
need for a current sensing resistor .
Advanced PWM and Linear Power Controller
Pin Description
SINK
PHASE
MEM1
PGND
BOOT
UGATE
SS
VCC
GND
MEM0
OCSET
VSEN
11
10
12
9
13
16
8
14
15
7
6
5
4
3
SOURCE
FB
VIN
SD
1
2
Copyright
ANPEC Electronics Corp. Rev. A.
Rev.A.1
- Dec., 2001
APW7055
www.anpec.com.tw
2
Ordering Information
Block Diagram
A P W 7 0 5 5
V o l t a g e C o d e
A : 2 . 4 0 ~ 2 . 5 5 V B : 2 . 6 0 ~ 2 . 7 5 V
C : 2 . 8 0 ~ 2 . 9 5 V D : 3 . 0 0 ~ 3 . 1 5 V
P a c k a g e C o d e
N : S S O P - 1 6
T e m p . R a n g e
C : 0 t o 7 0 C
H a n d l i n g C o d e
T U : T u b e T R : T a p e & R e e l
L e a d F r e e C o d e
L : L e a d F r e e D e v i c e B l a n k : O r i g i n a l D e v i c e
H a n d l i n g C o d e
T e m p . R a n g e
P a c k a g e C o d e
V o l t a g e C o d e
L e a d F r e e C o d e
Absolute Maximum Ratings
Symbol
Parameter
Rating
Unit
V
CC
Supply Voltage
15
V
V
I
, V
O
Input , Output or I/O Voltage
GND -0.3 V to V
CC
+0.3
V
T
A
Operating Ambient Temperature Range
0 to 70
C
T
J
Junction Temperature Range
0 to 125
C
T
STG
Storage Temperature Range
-65 to +150
C
T
S
Soldering Temperature
300 ,10 seconds
C
V C C
P o w e r O n
R e s e t
T h e r m a l
P r o t e c t io n
V
T T
C o n t r o l
S o f t S t a r t a n d
F a u lt L o g ic
O s c illa t o r
G a t e
C o n t r o l
T T L D / A
C o n v e r t e r
S D
S O U R C E
F B
S I N K
V C C
S S
O C S E T
B O O T
P G N D
V S E N
M E M 0
M E M 1
G N D
2 8
A
4 . 5 V
I N H I B I T
P W M
O C P
O V P
1 1 5 %
P H A S E
U G A T E
V
M E M
2 0 0 u A
E . A
5 0 %
V
T T
V
IN
Copyright
ANPEC Electronics Corp. Rev. A.
Rev.A.1
- Dec., 2001
APW7055
www.anpec.com.tw
3
Electrical Characteristics
Thermal Characteristics
Symbol
Parameter
Value
Unit
R
JA
Thermal Resistance in Free Air
SOIC
SOIC (with 3in
2
of Copper)
75
65
C/W
1. Recommended operating conditions, Unless otherwise noted.
2. Refer to Block and Simplified Power System Diagrams , and Typical Application Schematic.
APW 7055
Sym bol
Param eter
Test Conditions
Min.
Typ.
Max.
Unit
Supply Current
Nominal Supply Current
SD=0V, GATE Drive Open
7
I
CC
Shutdown Supply Current
SD=5V
2.7
mA
Power-on Reset
Rising VCC Threshold
Vocset=3V
4.2
4.6
V
CC
Falling VCC Threshold
Vocset=3V
3.6
V
V
OCSET
Rising V
OC SET
Threshold
1.26
V
Shutdown Input High
Voltage
2.0
V
SD
Shutdown Input Low Voltage
0.8
V
Oscillator
F
OSC
Free Running Frequency
185
200
215
kHz
V
OSC
Ramp Am plitude
1.9
V
PW M Controller Reference Voltage
V
DAC
DAC Voltage Accuracy
-1.5
+1.5
%
MEM 0-1 Input High Voltage
2.0
MEM 0-1 Input Low Voltage
0.8
V
Source-Sink Linear Controller
V
SOURCE
Source Regulation Voltage
-10mV 0.495VIN +10mV
V
SINK
Sink Regulation Voltage
-10mV 0.505VIN +10mV
V
I
Source
Source Drive Current
0.8
I
SINK
Sink Drive Current
0.8
mA
PW M Controllers Gate Drivers
V
CC
=5V,V
BOOT
=9.5V,
V
UGATE
=6V
1
I
UGATE
UGATE Source
V
CC
=12V,V
BOOT
=9.5V,
V
UGATE
=6V
1
A
V
CC
=5V,V
UGATE
=1V
3
R
GATE
UGATE Sink
V
CC
=12V, V
UGATE
=6V
3
3.5
Copyright
ANPEC Electronics Corp. Rev. A.
Rev.A.1
- Dec., 2001
APW7055
www.anpec.com.tw
4
Functional Pin Description
VCC (Pin 1)
Provide a +5V bias supply for the IC to this pin. This
pin also provides the gate bias charge for the MOS
FETs of the source-sink regulator. The voltage at th
is pin is monitored for Power-On Reset (POR)
purposes.
SS (Pin 2)
This pin provides the soft start for the standard buck
converter and source-sink regulator. Connect a ca-
pacitor from this pin to ground.This capacitor, along
with an internal 28uA current source,sets the soft-start
interval of the converter and preventing the outputs from
overshoot as well as limiting the input current .
SD (Pin 3)
T
he pin shuts down all the outputs. A TTL-compatible,
logic level high signal applied at this pin immediately
discharges the soft-start capacitor,disabling all the
outputs.When IC re-enabled, the IC undergoes a new
soft-start cycle.Left open, this pin is pulled low by an
internal pull-down resistor,enabling operation.
SOURCE (Pin 4)
Connect the pin to the upper MOSFET gate drive of
the source-sink regulator. This pin is used to drive the
1. Recommended operating conditions, Unless otherwise noted.
2. Refer to Block and Simplified Power System Diagrams , and Typical Application Schematic.
APW7055
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Protection
VSEN O.V. trip point (VSEN/V
DAC
)
VSEN Rising
115
120
VSEN O.V. Hysteresis
2
%
I
OCSET
Ocset Current Source
Vocset=3V
170
200
230
I
SS
Soft start Current
28
uA
upper external MOSFET as a source regulator.
SINK (Pin 5)
Connect the pin to the lower MOSFET gate drive of
the source-sink regulator.This pin is used to drive the
lower external MOSFET as a sink regulator.
FB (Pin 6)
Connect this pin to output of the source-sink regulator.
This pin provide the voltage feedback path for source
and sink regulators. This pin is internally connected
to the negative input of the source controller, and also
connected to the positive input of the sink controller.
VIN (Pin 7)
Connect this pin to a voltage source. Two voltages,
above 0.5VIN, are generated by an internal resistor
divider as the reference voltage of the source and sink
controllers. The internal resistor divider provides an
offset voltage to ensure higher sink regulation voltage
and prevent an direct current path through the upper
and lower MOSFETs, damaging the two MOSFETs.
GND (Pin 8)
Signal ground for the IC. All voltage levels are mea
sured with respect to this pin voltage protection.
Electrical Characteristics (Cont.)
Copyright
ANPEC Electronics Corp. Rev. A.
Rev.A.1
- Dec., 2001
APW7055
www.anpec.com.tw
5
Functional Pin Description (Cont.)
VSEN (Pin 9)
This pin is connected to the standard buck converter's
output voltage to provide the voltage feedback path for
PWM converter. The OVP(Over-Voltage-Protection)
comparator circuit use this signal to monitor output
v o l t a g e s t a t u s f o r o v e r - v o l t a g e p r o t e c t i o n .
OCSET (Pin 10)
Connect a resistor (R
OCSET
) from this pin to the drain of
the standard buck PWM converter's MOSFET. R
OCSET
,
an internal 200mA current source (I
OCSET
), and the
MOSFET's on-resistance(r
DS(ON)
) set the converter's
over-current (OC) trip point according to the following
equation:
I
PEAK
=
I
O CSET
x R
OCSET
r
DS(ON)
An over-current trip cycles the soft-start function
.
MEM0-1 (Pin 11-12)
MEM0-1 are TTL-compatible logic level input pins of
the 2-bits DAC.The status of these 2 pins set the in-
ternal reference voltage(V
DAC
) for the standard buck
converter and also sets the OVP threshold voltage.Table
1 shows the DAC table voltage.
PGND (Pin 13)
This is the power ground connection.
T
ie this pin to
the anode of the flywheel diode of the standard buck
PWM converter's circuit.
PHASE (Pin 14)
Connect the PHASE pin to the standard buck PWM
converter's MOSFET source.This pin is used to moni-
tor the voltage drop across the MOSFET for over-cur
rent protection.
UGATE (Pin 15)
Connect this pin to the MOSFET gate of the standard
buck PWM converter.This pin provides the gate drive
for the external MOSFET.
BOOT (Pin 16)
This pin provides bias voltage to the external MOSFET
driver. A bootstrap circuit may be used to pump a
boot voltage for enforcing the driving capability of the
gate driver and improving the performance of the
MOSFET.
Table 1 DAC Table
APW7055 - A
APW7055 - B
Pin Name
MEM1
MEM0
V
MEM
Voltage
0
0
2.60
0
1
2.65
1
0
2.70
1
1
2.75
Pin Name
MEM1
MEM0
V
MEM
Voltage
0
0
2.40
0
1
2.45
1
0
2.50
1
1
2.55
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