ANPEC Electronics Corp.

Rev.A.2 - Mar., 2002

APW7046

www.anpec.com.tw

ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise

customers to obtain the latest version of relevant information to verify before placing orders.

Features

··
··
·

3 Regulated Voltages are provided

Standard Buck Converter for VCORE

(1.15~1.50V)

Standard Buck Converter for VMEM

(2.40~3.15V)

Linear Controller with SOURCE-SINK Regul-

ation for VTT(1.25V)

··
··
·

Simple Single-Loop Control Design

Voltage-Mode PWM Control

··
··
·

Excellent Output Voltage Regulation

VCORE Output : ±1% Over Temperature

VMEM Output : ±1.5% Over Temperature

VTT Output : 1/2 VIN ±25mV Over Tempera-

ture

Min. VIN = 1.7V

··
··
·

Fast Transient Response

Built-in Feedback Compensation

Full 0% to 100% Duty Ratio

··
··
·

Over-Voltage and Over-Current Fault Monitor

··
··
·

Constant Frequency Operation(200kHz)

··
··
·

24 pins, SOIC Package

Applications

··
··
·

M/B DDR Power Regulation

··
··
·

AGP/PCI Graphics Power Regulation

··
··
·

SSTL-2 Termination

General Description

The APW7046 provides the power controls and protec-

tions for three output voltages on AGP/PCI Graphic Card

applications. It integrates two PWM controllers , one

SOURCE-SINK linear controller, as well as the monitor

and protection functions into a single package. One PWM

converter (PWM1) supplies the VCORE(1.5V) for the GPU

with a standard buck converter. The other standard buck

converter (PWM2) regulates the VMEM(2.5V) for the pow-

er of DDR memory. The SOURCE-SINK linear controller

control two external MOSFETs to be a linear regulator

with the capability of sourcing and sinking current. It reg-

ulates the VTT (1.25V) power for DDR Termination voltage.

Additional built-in over-voltage protection (OVP) will be

started when the VCORE or VMEM output is above 115%

of each DAC setting (V

CORE

and V

MEM

). OVP function will

shutdown the all output voltages until re-powering on the

IC. For each PWM converter, the over-current function

monitors the output current by sensing the voltage drop

across the MOSFET`s r

DS(ON)

, eliminating the need for a

current sensing resistor.

Dual Advanced PWM and Source-Sink Linear Controller

Pin Description

VCC

UGATE 1

PHASE1

SO URCE

SINK

VIN

OCSET1

VSE N1

GND

BOOT

UGATE 2

PHASE2

PG ND

MEM2

MEM1

MEM0

CORE2

CORE1

CORE0

OCSET2

VSE N2

ANPEC Electronics Corp. Rev. A.

Rev.A.2

- Mar., 2002

APW7046

www.anpec.com.tw

A P W 7 0 4 6

V o lta g e C o d e
A : V C O R E (1 .1 5 ~ 1 .5 0 V ) V M E M (2 .4 0 ~ 2 .7 5 V )
B : V C O R E (1 .1 5 ~ 1 .5 0 V ) V M E M (2 .8 0 ~ 3 .1 5 V )
P a c k a g e C o d e
K : S O P -2 4
T e m p . R a n g e
C : 0 to 7 0 ° C
H a n d lin g C o d e
T U : T u b e T R : T a p e & R e e l
L e a d F re e C o d e
L : L e a d F r e e D e v ic e B la n k : O r ig in a l D e v ic e

H a n d lin g C o d e

T e m p . R a n g e

P a c k a g e C o d e

V o lta g e C o d e

A P W 7 0 4 6 K :

A P W 7 0 4 6

X X X X X

X X X X X - D a te C o d e

L e a d F re e C o d e

Ordering and Marking Information

Block Diagram

Absolute Maximum Ratings

Symbol

Parameter

Rating

Unit

Supply Voltage

, V

Input , Output or I/O Voltage

GND -0.3 V to V

+0.3

Operating Ambient Temperature

Range 0 to 70

Junction Temperature

Range 0 to 125

STG

Storage Temperature

Range -65 to +150

Soldering Temperature

300 ,10 seconds

V C C

P o w e r O n

R e s e t

T h e r m a l

P r o t e c t i o n

S o f t - S t a r t a n d

F a u l t L o g i c

O s c i l l a t o r

G a t e

C o n t r o l

G a t e

C o n t r o l

T T L D / A

C o n v e r t e r

T T L D / A

C o n v e r t e r

S D

S O U R C E

F B

S I N K

V C C

S S

O C S E T 1

B O O T

U G A T E 1

P H A S E 1

V S E N 1

C O R E 0
C O R E 1
C O R E 2

V S E N 2

M E M 0
M E M 1
M E M 2

U G A T E 2

P G N D

P H A S E 2

G N D

O C S E T 2

V I N

2 8

4 . 5 V

IN H IB IT

O C 2

P W M 2

IN H IB IT

E A 2

E A 1

P W M 1

IN H IB IT

2 0 0

O C 1

B O O T

O V P 2

1 1 5 %

M E M

1 1 5 %

V c o r e

O V P 1

5 0 %

2 0 0 u A

B u f f e r

R e s i s t o r

D i v i d e r

C O R E

M E M

ANPEC Electronics Corp. Rev. A.

Rev.A.2

- Mar., 2002

APW7046

www.anpec.com.tw

Electrical Characteristics

Thermal Characteristics

Symbol

Parameter

Value

Unit

Thermal Resistance in Free Air

SOIC
SOIC (with 3in

of Copper)

75
65

C/W

Unless otherwise specified, these specifications apply over V

BOOT

=12V and T

=0~70°C.

Typical values refer to T

=25°C.

A PW 704 6

Sym b ol

Param ete r

Test Co ndition s

M in .

Typ .

M ax.

U nit

Supply C urrent

C C

N om inal S upply C urrent

SD =0V, UG AT E1,UG ATE 2
, S O U RC E, and SIN K O pen

C C SD

Shutdow n S upply C urren t

SD =5V

2.7

m A

Power-on Reset

R ising V C C Threshold

Vocset=3V

4.2

4.6

Falling VC C Threshold

Vocset=3V

3.6

SD Input High Volta ge

2.0

SD Input Low Voltage

0.8

O scillator

O SC

Free Running F requency

185

200

215

kH z

O SC

R am p A m plitude

1.9

PW M Co ntroller R eference Vo ltage

C O R E

PW M 1 R eference Voltage
Accuracy

-1

C O R E0-C O R E2 Input H igh
Voltage

2.0

C O R E0-C O R E2 Input Low
Voltage

0.8

M EM

PW M 2 R eference Voltage
Accuracy

-1.5

+1.5

M EM 0-M EM 2 Inp ut H igh
Voltage

2.0

M EM 0-M EM 2 Inp ut Low
Voltage

0.8

SO U RC E-SIN K L inear Co ntroller

F B

FB R egulation Voltage

R egulator So urcing or S inking
C urrent

0.5V IN

F B

accuracy

-25

+25

m V

M ax. SO U RC E Pin Drive
C urrent

¡ Ó

0.8

m A

M ax. S IN K P in D rive Current

¡ Ó

0.8

m A

ANPEC Electronics Corp. Rev. A.

Rev.A.2

- Mar., 2002

APW7046

www.anpec.com.tw

Functional Pin Description

VCC (Pin 1)

Provide a +12V bias supply for the IC to this pin. This

pin also provides the gate bias charge for the

MOSFETs of the SOURCE-SINK regulator. The volt-

age at this pin is monitored for Power-On Reset (POR)

purposes.

UGATE1 (Pin 2)

Connect this pin to the MOSFET gate of the PWM1

converter. This pin provides the gate drive for the

MOSFET.

PHASE1 (Pin 3)

Connect this pin to the PWM1 converter's MOSFET

source.This pin is used to monitor the voltage drop

across the MOSFET for over-current protection.

SS (Pin 4)

Connect a capacitor from this pin to ground.This

capacitor, along with an internal 28uA current source,

APW7046

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

VIN

VIN Input Bias Current

VIN=2.5V

PWM Controllers Gate Drivers

UGATE

UGATE1,2 Source

BOOT

=12V,

UGATE1,2

=6V

0.74

GATE

UGATE Sink

=12V,V

UGATE1,2

=6V

Protection

VSEN1,2 OVP trip point
(VSEN1/V

CORE

and VSEN2/V

MEM

)

VSEN Rising

115

120

VSEN1,2 O.V. Hysteresis

OCSET

Ocset Current Source

Vocset=3V

170

200

230

Soft start Current

sets the soft-start interval of all power controls and

preventing the outputs from overshoot as well as limit-

ing the input current .

SD (Pin 5)

The pin shuts down all power outputs. A TTL compat-

ible , logic level high signal applied at this

pin immedi-

ately discharges the soft-start capacitor,disabling all

power outputs. When re-enabled, the IC undergoes a

new soft-start cycle. Left open, this pin is pulled low

by an internal pull-down resistor, enabling operation.

SOURCE (Pin 6)

Connect this pin to the upper MOSFET gate drive of

the SOURCE-SINK regulator. This pin drives the up-

per external MOSFET as a sourcing regulator.

SINK (Pin 7)

Connect this pin to the lower MOSFET gate drive of

Electrical Characteristics (Cont.)

Unless otherwise specified, these specifications apply over V

BOOT

=12V and T

=0~70°C.

Typical values refer to T

=25°C.

ANPEC Electronics Corp. Rev. A.

Rev.A.2

- Mar., 2002

APW7046

www.anpec.com.tw

Functional Pin Description (Cont.)

the SOURCE-SINK regulator. This pin drives the lower

external MOSFET as a sinking regulator.

FB (Pin 8)

Connect this pin to output of the SOURCE-SINK

regulator. This pin provides the voltage feedback path

for the sourcing and sinking regulators. This pin is in-

ternally connected to the negative input of the SOURCE

controller, and also connected to the positive input of

the SINK controller.

VIN (Pin 9)

Connect this pin to VMEM or a fixed voltage source.

Two voltages, about 0.5VIN, are generated by an inter-

nal resistor divider as the reference voltages of the sourc-

ing and sinking regulators. The sinking regulation volt-

age is higher than the sourcing one to prevent a direct

current path through the upper and lower MOSFETs.

OCSET1 (Pin 10)

Connect a resistor (R

OCSET

) from this pin to the drain of

the PWM1 converter's MOSFET. R

OCSET

, an internal

200uA current source (I

OCSET

), and the MOSFET's on-

resistance(r

DS(ON)

) set the converter's over-current (OC)

trip point according to the following equation:

PEAK

OCSET

x R

O CS ET

DS( ON)

An over-current trip cycles the soft-start function. The

voltage at this pin is monitored for Power-On Reset

(POR) purposes.

VSEN1 (Pin 11)

This pin is connected to the PWM1 converter's output

voltage to provide the voltage feedback path. The over-

voltage protection(OVP) comparator uses this pin to

monitor the output voltage for over- voltage protection

GND (Pin 12)

Signal ground for the IC. All voltage levels are mea-

sured with respect to this pin.

VSEN2 (Pin 13)

This pin is connected to the PWM2 converter's output

voltage to provide the voltage feedback path. The over-

voltage protection(OVP) comparator uses this pin to

monitor the output voltage for over- voltage protection.

OCSET2 (Pin 14)

Connect a resistor (R

OCSET

) from this pin to the drain of

the PWM2 converter's MOSFET. The function of this pin is

similar to OCSET1(pin 10) for OC detection and POR

purposes.

CORE0-2 (Pin 15-17)

CORE0-2 are TTL-compatible logic level input pins to

the 3-bit DAC. The states of the three pins set the

internal reference voltage (V

CORE

) for the PWM1 con-

verter and also set the OVP threshold voltage for

PWM1 converter.

MEM0-2 (Pin 18-20)

MEM0-2 are TTL-compatible logic level input pins to

the other 3-bit DAC. The states of the three pins set

the internal reference voltage (V

MEM

) for the PWM2

converter and also set the OVP threshold voltage for

PWM2 converter.

PGND (Pin 21)

Connect this pin to the anode of the flywheel diodes

of the two PWM converters.

PHASE2 (Pin 22)

Connect this pin to the PWM2 converter's MOSFET

source.This pin is used to monitor the voltage drop

across the MOSFET for over-current protection.

ANPEC Electronics Corp. Rev. A.

Rev.A.2

- Mar., 2002

APW7046

www.anpec.com.tw

Table 1 DAC Table

APW7046 - A

Pin Name

CORE2

CORE1

CORE0

CORE

Voltage

1.15

1.20

1.25

1.30

1.35

1.40

1.45

1.50

Pin Name

MEM2

MEM1

MEM0

MEM

Voltage

2.80

2.85

2.90

2.95

3.00

3.05

3.10

3.15

Pin Name

CORE2

CORE1

CORE0

CORE

Voltage

1.15

1.20

1.25

1.30

1.35

1.40

1.45

1.50

Pin Name

MEM2

MEM1

MEM0

MEM

Voltage

2.40

2.45

2.50

2.55

2.60

2.65

2.70

2.75

UGATE2 (Pin 23)

Connect this pin to the MOSFET gate of the PWM2

converter. This pin provides the gate drive for the

MOSFET.

BOOT (Pin 24)

Connect this pin to +12V. This pin provides bias volt-

age to the MOSFET drivers.

Functional Pin Description

APW7046 - B

ANPEC Electronics Corp. Rev. A.

Rev.A.2

- Mar., 2002

APW7046

www.anpec.com.tw

Typical Application Circuit

OC SET 2

U GA T E2

PH A SE2

PGN D

VSEN 2

M EM 0

M EM 2

M EM 1

SIN K

SOU R C E

C OR E2

C OR E1

C OR E0

U GA T E1

VIN

OC SET 1

PH A SE1

VSEN 1

+ 3.3V

V CORE

+ 5V

V M E M

V TT

V M E M

MEM2

MEM1

MEM0

CORE2
CORE1

CORE0

+ 12V

1uF

R9
5.1

C12

10uF

C13

330uF

C14

10uF

C15

330uF

C11

200pF

1.5K

200pF

1.5K

R3
5.1

10uF

330uF

10uF

1uH

7.8uH

R10

R11

D2
MBRD835L

A PM9410

D1
MBRD835L

4.7uH

R5
1K

330uF

C10

330uF

10K

0.1uF

A PM3055

C16

0.68uF

1uH

C4, C6, C7, C8 , C10, C13, C15 : 330uF/6.3V

S M D Low E S R tantalum Capac itor

S tandard B uck

C o n v erte r

(PW M 1)

S tandard B uck

C o n v erte r

(PW M 2)

SOURCE-SINK

Linear C onverter

APW 7046

V CORE

+3.3V

V M E M

+5V

VTT

Q 1

Simplified Power System Diagram

ANPEC Electronics Corp. Rev. A.

Rev.A.2

- Mar., 2002

APW7046

www.anpec.com.tw

Packaging Information

SO 300mil ( Reference JEDEC Registration MS-013)

G A U G E

P L A N E

A 1

Millimeters

Variations- D

Inches

Variations- D

Dim

Min.

Max.

Variations

Min.

Max.

Dim

Min.

Max. Variation

Min.

Max.

2.35

2.65

SO-16

10.10

10.50

0.093 0.1043

SO-16

0.398

0.413

0.10

0.30

SO-18

11.35

11.76

0.004 0.0120

SO-18

0.447

0.463

0.33

0.51

SO-20

12.60

0.013

0.020

SO-20

0.496

0.512

See variations

SO-24

15.20

15.60

See variations

SO-24

0.599

0.614

7.40

7.60

SO-28

17.70

18.11

0.2914 0.2992

SO-28

0.697

0.713

1.27BSC

SO-14

8.80

9.20

0.050BSC

SO-14

0.347

0.362

10.65

0.394

0.419

0.40

1.27

0.016

0.050

See variations

ANPEC Electronics Corp. Rev. A.

Rev.A.2

- Mar., 2002

APW7046

www.anpec.com.tw

t 25 C to P e ak

R am p-u p

R am p-d ow n

P rehea t

T sm ax

T sm in

Tem

T im e

C ritical Z one

to T

Physical Specifications

Sn-Pb Eutectic Assembly

Pb-Free Assembly

Profile Feature

Large Body

Small Body

Large Body

Small Body

Average ramp-up rate
(T

to T

)

C/second max.

Preheat

Temperature Min (Tsmin)

Temperature Mix (Tsmax)

Time (min to max)(ts)

100

150

60-120 seconds

150

200

60-180 seconds

Tsmax to T

- Ramp-up Rate

C/second max

Tsmax to T

Temperature(T

)

Time (t

)

183

60-150 seconds

217

60-150 seconds

Peak Temperature(Tp)

225 +0/-5

C 240

+0/-5

C 245

+0/-5

C 250

+0/-5

Time within 5

C of actual Peak

Temperature(tp)

10-30 seconds

10-30 seconds 20-40 seconds

Ramp-down Rate

C/second max.

Time 25

C to Peak Temperature

6 minutes max.

8 minutes max.

Note: All temperatures refer to topside of the package. Measured on the body surface.

Reflow Condition

(IR/Convection or VPR Reflow)

Classificatin Reflow Profiles

Terminal Material

Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn

Lead Solderability

Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.

Packaging

1000 devices per reel for SO-16 , 2500 devices per reel for SSOP-16.

ANPEC Electronics Corp. Rev. A.

Rev.A.2

- Mar., 2002

APW7046

www.anpec.com.tw

Reliability test program

Test item

Method

Description

SOLDERABILITY

MIL-STD-883D-2003

245

C , 5 SEC

HOLT

MIL-STD-883D-1005.7

1000 Hrs Bias @ 125

PCT

JESD-22-B, A102

168 Hrs, 100 % RH , 121

TST

MIL-STD-883D-1011.9

-65

C ~ 150

C, 200 Cycles

ESD

MIL-STD-883D-3015.7

VHBM > 2KV, VMM > 200V

Latch-Up

JESD 78

10ms , I

> 100mA

Carrier Tape & Reel Dimensions

A o

P o

K o

B o

D 1

P 1

T 2

T 1

Application

330

1.5

12.75

0.15

0.6

24.4

0.2

0.3

0.1

1.75

0.1

SOP- 24

11.5

0.1 1.55 +0.1

1.5+ 0.25

4.0

0.1

2.0

0.1

10.9

0.1 15.9

0.1

3.1

0.1 0.35

0.05

(mm)

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