Copyright
ANPEC Electronics Corp.
Rev.A.5 - Jan., 2003
APW7045
www.anpec.com.tw
1
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
The APW7045 integrates PWM controller and linear
controller, as well as the monitoring and protection
functions into a single package, which provides two
controlled power outputs with over-voltage and over-
current protections. The PWM controller regulates
the DDR termination voltage (1.25V) or GPU Voltage
(2.05V) with a synchronous-rectified buck converter.
The linear controller regulates the Memory Voltage
(2.5V). The pre cision reference and voltage-mode
PWM control provide
1
%
static regulation. The lin-
ear controller drives an external N-channel MOSFET
to provide adjustable voltage. The APW7045 moni-
tors two output voltages, and a single Power Good
signal is issued when the PWM voltage is within
10
%
of the DAC setting and the lineat regulator output level
is above under-voltage threshold. Additional built-in
over-voltage protection for the PWM output uses the
lower MOSFET to prevent output voltages above 115
%
of the DAC setting. The PWM over-current function
monitors the output current by using the voltage drop
across the upper MOSFET's R
DS(ON)
, eliminating the
need for a current sensing resistor.
Features
2 Regulated Voltage are provided
-
Switching Power for Fixed Voltage (1.0V)
-
Linear Regulator for V
MEM
(2.5V)
Simple Single-Loop Control Design
-
Voltage-Mode PWM Control
Excellent Output Voltage Regulation
-
PWM Output: 1%
-
Linear Output: 3%
Fast Transient Response
-
High-Bandwidth Error Amplifier
-
Full 0% to 100% Duty Ratio
Power-Good Output Voltage Monitor
Over-Voltage and Over-Current Fault Monitors
Small Converter Size
-
200KHz Free-Running Oscillator ;
Progammable from 50KHz to 800KHz
-
Reduce External Component Count
Applications
Motherboard Power Regulation for Computers
Low-Voltage Distributed Power Supplies
VGA Card Power Regulation
DDR SDRAM Power Regulation
General Description
Advanced PWM and Linear Power Controller
Pin Description
FB2
LGATE
OCSET
PG ND
UG ATE
PHASE
DRIVE
VCC
GND
VSEN1
FB1
CO M P
1
11
10
12
9
13
16
8
14
15
7
6
5
4
3
2
SD
SS
FAULT
PG OO D
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2
APW7045
Copyright
ANPEC Electronics Corp.
Rev.A.5 - Jan., 2003
Ordering and Marking Information
Block Diagram
A PW 7045
V olta ge C o de
1 0 : 1.0 V
P ack ag e C od e
K : S O P - 16 (1 50 m il) N : S S O P -1 6
T e m p. R an ge
C : 0 to 70 C
H and lin g C od e
T U : T u be T R : T ape & R e el
H and lin g C od e
T e m p. R an ge
P ack ag e C od e
V olta ge C o de
A P W 70 45 K /N :
A P W 70 45
X X X X X
X X X X X - D ate C od e
PGOOD
Power-on
Reset
(POR)
VCC
200
A
X1.10
+
-
GA TE
CONTROL
+
-
PW M
COMP 1
SY NCH
DRIV E
OV
UGATE
PHASE
V
CC
LGATE
PGND
COMP
FB1
OCSET
VSEN1
ERROR
AM P1
PW M 1
VCC
INHIBIT
OC1
DRIVE
+
-
+
-
+
-
+
-
X0.90
X 1.15
GND
FB2
+
-
X 0.75
+
-
1.5V
+
-
DAC
+
-
SO FT
START &
FA ULT
LOGIC
SS
OS CILLATO R
V
CC
INHIBIT
SD
FAULT
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3
APW7045
Copyright
ANPEC Electronics Corp.
Rev.A.5 - Jan., 2003
Absolute Maximum Ratings
Symbol
Parameter
Rating
Unit
V
CC
Supply Voltage
15
V
V
I
, V
O
Input , Output or I/O Voltage
GND -0.3 V to V
CC
+0.3
V
T
A
Operating Ambient Temperature Range
0 to 70
C
T
J
Junction Temperature Range
0 to 125
C
T
STG
Storage Temperature Range
-65 to +150
C
T
S
Soldering Temperature
300 ,10 seconds
C
Electrical Characteristics
Thermal Characteristics
Symbol
Parameter
Value
Unit
JA
Thermal Resistance in Free Air
SOIC
SOIC (with 3in
2
of Copper)
75
65
C/W
(Recommended operating conditions , Unless otherwise noted) Refer to Block and Simplified Power System
Diagrams , and Typical Application Schematic.
APW7045
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
CC
Supply Current
I
CC
Nominal Supply Current
UGATE, LGATE, DRIVE
open
4
mA
Power-on Reset
Rising VCC Threshold
Vocset=4.5V
10.7
V
CC
Falling VCC Threshold
Vocset=4.5V
8.2
V
OCSET
Rising V
OCSET
Threshold
1.26
V
Shutdown Input High Voltage
2.0
V
SD
Shutdown Input Low Voltage
0.8
V
Oscillator
F
OSC
Free Running Frequency
Fault= Open
185
200
215
kHz
V
OSC
Ramp Amplitude
Fault= Open
1.9
V
P-P
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4
APW7045
Copyright
ANPEC Electronics Corp.
Rev.A.5 - Jan., 2003
Electrical Characteristics (Cont.)
APW7045
Symbol
Parameter
Test Conditions
Min.
Typ. Max.
Unit
DAC Reference Voltage
V
DAC
Reference Voltage APW7045-10
1.00
V
Reference Voltage accuracy
-1.0
+1.0
%
Linear Regulator
Reference Voltage
1.5
V
Regulation
3
%
Output Drive Current
V
DRIVE
=4V
20
40
mA
Synchronous PWM Controller Error Amplifier
DC Gain
88
dB
GBWP Gain-Bandwidth Product
15
MHz
SR
Slew Rate
COMP=10pF
6
V/
s
PWM Controller Gate Driver
I
UGATE
UGATE Source
V
CC
=12V, V
UGATE
=6V
1
A
R
UGATE
UGATE Sink
V
UGATE1
=1V
2.1
3.5
I
LGATE
LGATE Source
V
CC
=12V, V
LGATE
=1V
1
A
R
LGATE
LGATE Sink
V
LGATE
= 1V
1.6
3
Protection
VSEN1 Over-Voltage
VSEN1 Rising
115
120
%
VSEN1 Over-Voltage Hysteresis
2
%
I
OCSET
OCSET Current Source
V
OCSET
= 4.5V
170
200
230
A
I
SS
Soft Start Current
28
A
Power Good
VSEN1
Upper Threshold
VSEN1 Rising
109
%
VSEN1
Under Voltage
VSEN1 Rising
93
%
VSEN1
Hysteresis
Upper /Lower Threshold
2
%
V
PGOOD
PGOOD Voltage Low
I
PGOOD
= -4mA
0.2
0.8
V
Functional Pin Description
(Recommended operating conditions, Unless otherwise noted) Refer to Block and Simplified Power System
Diagram, and Typical Application Schematic.
VCC (Pin 1)
Provide a 12V bias supply for the IC to this pin. This
pin also provides the gate bias charge for all the
MOSFETs controlled by the IC. The voltage at this
pin is monitored for Power-On Reset (POR) purposes.
DRIVE (Pin 2)
Connect this pin to the gate of an external MOSFET.
This pin provides the drive for the V
MEM
regulator's pass
transistor.
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5
APW7045
Copyright
ANPEC Electronics Corp.
Rev.A.5 - Jan., 2003
RT-1
R
DS(ON)
Functional Pin Description (Cont.)
PGOOD (Pin 3)
PGOOD is an open collector output used to indicate
the status of the output voltages. This pin is pulled
low when the synchronous regulator output is not within
10% of the DAC reference voltage or linear regula-
tor output is below under-voltage threshold.
SD (Pin 4)
The pin shuts down all the outputs. A TLL-compatible
, logic level high signal applied at this pin immediately
discharges the soft-start capacitor , disabling all the
outputs . Left open , this pin is pulled low by an inter-
nal pull-down resistor , enabling operation.
FB2 (Pin 5)
Connect this pin to a resistor divider to set the linear
regulator output voltage (V
MEM
). The output voltage
set by the resistor divider is determined using the
following formula :
V
MEM
= 1.5V x (1 + )
Where R
OUT
is the resistor connected from V
MEM
to
FB2, and R
GND
is the resistor connected from FB2 to
ground. The voltage at this pin is also monitored for
Under-Voltage protection.
SS (Pin 6)
Connect a capacitor from this pin to ground. This
capacitor , along with an internal 28uA current source
, sets the soft-start interval of the converter.
FAULT (Pin 7)
This pin provides oscillator switching frequency
adjustment, referring to the typical performence. By
placing a resistor (RT, k
) from this pin to GND, the
nominal 200kHz switching frequency is increased
according to the following equation :
Fs =200 +
x (1.16 - ) (kHz)
(R
T
to GND, R
T
10k
is more accurate)
Conversely, connecting a resistor from this pin to +12V
reduces the switching frequency according to the
following equation :
Fs =200 + (kHz)
(R
T
to 12V, R
T
250 k
is more accurate)
Nominally, the voltage at this pin is 1.26V. In the event
of an over-voltage or over-current condition, this pin
is internally pulled to VCC.
GND (Pin 8)
Signal ground for the IC. All voltage levels are
measured with respect to this pin.
COMP and FB1 (Pin 9, and 10)
COMP and FB1 are the available external pins of the
PWM converter error amplifier. The FB1 pin is the
inverting input of the error amplifier. Similarly , the
COMP pin is the error amplifier output. These pins are
used to compensate the voltage-mode control feed-
back loop of the synchronous PWM converter.
VSEN1 (Pin 11)
This pin is connected to the PWM converter's output
voltage. The PGOOD and OVP comparator circuits
use this signal to report output voltage status and for
over- voltage protection.
OCSET (Pin 12)
Connect a resistor (R
OCSET
) from this pin to the drain
of PWM converter's upper MOSFET. R
OCSET
, an in-
ternal 200
A current source (I
OCSET
), and the
MOSFET's on-resistance(R
DS(ON)
) set the converter's
over-current (OC) trip point according to the follow-
ing equation:
I
PEAK
=
R
OUT
R
GND
1.4
4000
RT
47920
R
T
I
OCSET
x
R
OCSET
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