Copyright
ANPEC Electronics Corp.
Rev. A.1 - Mar., 2001
APW6021A
www.anpec.com.tw
1
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Advanced PWM and Triple Linear Power Controllers
General Description
Applications
Motherboard Power Regulation for Computers
Functional
The APW6021A provides the power control and pro-
tection for four output voltages in high-performance,
graphics intensive microprocessor and computer
applications. The IC integrates voltage-mode PWM
controller and three linear controllers, as well as the
monitoring and protection functions into a 28-pin SOIC
package. The synchronous-rectified buck converter
includes an Intel-compatible , TTL 5-input digital-to-
analog converter (DAC)that adjusts the core PWM
output voltage from 1.3V
DC
to 2.05V
DC
in 0.05V steps
and from 2.1V
DC
to 3.5V
DC
in 0.1V increments. the
precision reference and voltage-mode control provide
1% static regulation. A TTL-compatible signal ap-
plied to the SELECT pin dictates which method of
control is used for the AGP bus power : a low state
results in linear control of the AGP bus to 1.5V , while
a high state transitions the output through a linearly
controlled softstart to 3.3V , followed by full enhance-
ment of the external MOSFET to pass the input
voltage. The other two linear regulators provide fixed
output voltages of 1.5V GTL bus power and 1.8V
power for the North/South Bridge core and/or cache
memory. These levels are user-adjustable by means
of an external resistor divider and pulling the FIX pin
low. All linear controllers can employ either N-Chan-
nel MOSFETs or bipolar NPNs for the pass transistor.
The APW6021A monitors all the output voltages. A
single Power Good signal is issued when the core is
within
10
%
of the DAC setting and all other outputs
are above their under-voltage levels. Additional built-
in over-voltage protection for the core output uses
the lower MOSFET to prevent output voltages above
115
%
of the DAC setting. The PWM controller's over-
current function monitors the output current by using
the voltage drop across the upper MOSFET's r
DS(ON)
.
4 Regulated Voltages are provided
Microprocessor Core (1.3V to 3.5V)
AGP Bus (1.5V or 3.3V)
Memory (1.8V)
/
GTL Bus (1.5V)
Linear Controllers Drives with both MOSFET
and Bipolar Series Pass Transistors
Fixed or Externally Resistor-Adjustable Linear
Outputs (FIX Pin)
Voltage-Mode PWM Control
Fast PWM Converter Transient Response
High-Bandwidth Error Amplifier
Full 0
%
to 100
%
Duty Ratio
Excellent Output Voltage Regulation
Core PWM Output:
1
%
Over Temperature
Other Outputs:
3
%
Over Temperature
TTL-Compatible 5- Bit DAC Microprocessor
Core Output Voltage Selection
Shutdown Feature Removed When All Inputs
High
Wide Range - 1.3V
DC
to 3.5 V
DC
Power-Good Output Voltage Monitor
Over-Voltage and Over-Current Fault Monitors
Switching Regulator Does Not Require
Extra Current Sensing Element, Uses Upper
MOSFET's r
DS(ON)
Small Converter Size
Constant Frequency Operation
200kHz Free-Running Oscillator; Program-
mable From 50kHz to Over 1MHz
Copyright
ANPEC Electronics Corp.
Rev. A.1 - Mar., 2001
APW6021A
www.anpec.com.tw
2
Pin Description
Ordering Information
V C C
F A U L T / R T
1
2
3
4
5
6
7
8
S D
1 2
1 1
1 0
9
S S
1 6
1 5
1 3
1 4
1 7
1 8
1 9
2 0
2 4
2 3
2 2
2 1
2 8
2 7
2 6
2 5
L G A T E
O C S E T
V S E N 1
P G N D
F B
C O M P
U G A T E
P H A S E
D R I V E 3
G N D
V A U X
D R I V E 4
V I D 4
V I D 3
V I D 0
V I D 1
V I D 2
D R I V E 2
FIX
P G O O D
V S E N 2
S E L E C T
V S E N 4
V S E N 3
A P W 6 0 2 1 A
P a c k a g e C o d e
K : S O P - 2 8
T e m p . R a n g e
C : 0 t o 7 0 C
H a n d lin g C o d e
T U : T u b e T R : T a p e & R e e l
L e a d F r e e C o d e
L : L e a d F r e e D e v ic e B la n k : O r ig in a l D e v ic e
H a n d lin g C o d e
T e m p . R a n g e
P a c k a g e C o d e
L e a d F r e e C o d e
Absolute Maximum Ratings
Symbol
Parameter
Rating
Unit
V
CC
Supply Voltage
15
V
V
BOOT
V
PHASE
Boot Voltage
15
V
V
I
, V
O
Input , Output or I/O Voltage
GND -0.3 V to V
CC
+0.3
V
T
A
Operating Ambient Temperature Range
0 to 70
C
T
J
Junction Temperature Range
0 to 125
C
T
STG
Storage Temperature Range
-65 to +150
C
T
S
Soldering Temperature
300 ,10 seconds
C
Copyright
ANPEC Electronics Corp.
Rev. A.1 - Mar., 2001
APW6021A
www.anpec.com.tw
4
Electrical Characteristics
(Recommended operating conditions, Unless otherwise noted) Refer to Block and Simplified Power
System Diagrams, and Typical Application Schematic
APW6021A
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
CC
Supply Current
I
CC
Nominal Supply Current
UGATE, LGATE, DRIVE2,
DRIVE3, and DRIVE4 open
9
mA
Power-on Reset
Rising VCC Threshold
Vocset=4.5V
10.4
V
Falling VCC Threshold
Vocset=4.5V
8.2
V
Rising VAUX Threshold
Vocset=4.5V
2.5
V
VAUX Threshold Hysteresis
Vocset=4.5V
0.5
V
Rising V
OCSET
Threshold
1.26
V
Oscillator
F
OCS
Free Running Frequency
RT= Open
185
200
215
kHz
V
OSC
Ramp Amplitude
RT= Open
1.9
V
P-P
DAC and Bandgap Reference
DAC(VID0-VID4) Input Low
Voltage
0.8
V
DAC(VID0-VID4) Input High
Voltage
2.0
0.8
V
DACOUT Voltage accuracy
-1.0
+1.0
%
V
BG
Bandgap Reference Voltage
1.265
V
Bandgap Reference Tolerance
-2.5
+2.5
%
Linear Regulators (OUT2, OUT3, and OUT4)
Regulation (All Linears)
3
%
VREG
2
VSEN2 Regulation Voltage
Select < 0.8V
1.5
V
VREG
3
VSEN3 Regulation Voltage
1.5
V
VREG
4
VSEN4 Regulation Voltage
1.8
V
VREN
UV
Under-Voltage Level (VSEN/
VREG)
VSEN Rising
75
%
Under-Voltage Hysteresis (VSEN/
VREG)
VSEN Falling
7
%
Output Drive Current (All Liners)
VAUX-V
DRIVE
>0.6V
20
40
mA
Copyright
ANPEC Electronics Corp.
Rev. A.1 - Mar., 2001
APW6021A
www.anpec.com.tw
5
Electrical Characteristics Cont.
Functional Pin Description
DRIVE2 (Pin 1)
Connect this pin to the gate of an external MOSFET.
This pin provides the drive for the AGP regulator's
pass transistor.
FIX (Pin 2)
Grounding this pin bypasses the internal resistor di-
viders that set the output voltage of the 1.5V and 1.
8V linear regulators. This way, the output voltage of
the two regulators can be adjusted from 1.26V up to
the input voltage (+3.3V or +5V) by way of an exter-
nal resistor divider connected at the corresponding
VSEN pin. The new output voltage set by the exter-
nal resistor divider can be determined using the fol-
lowing formula:
V
OUT
=1.265V
[
1+R
OUT
/ R
GND
]
where R
OUT
is the resistor connected from VSEN to
the output of the regulator, and R
GND
is the resistor
connected from VSEN to ground. Left open, the FIX
pin is pulled high, enabling fixed output voltage
operation.
APW6021A
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Synchronous PWM Controller Error Amplifier
DC Gain
88
dB
GBWP Gain-Bandwidth Product
15
MHz
SR
Slew Rate
COMP=10pF
6
V/
s
PWM Controller Gate Driver
I
UGATE
UGATE Source
V
CC
=12V, V
UGATE
=6V
1
A
R
UGATE
UGATE Sink
V
UGATE1-PHASE
=1V
3.5
I
LGATE
LGATE Source
V
CC
=12V, V
LGATE
=1V
1
A
R
LGATE
LGATE Sink
V
LGATE
= 1V
3
Protection
VSEN1 Over-Voltage
(VSEN1/DACOUT)
VSEN1 Rising
115
120
%
I
OVP
FAULT Souring Current
V
FAULT/RT
=2.0V
8.5
mA
I
OCSET
OCSET1 Current Source
V
OCSET
= 4.5V
DC
170
200
230
A
I
SS
Soft Start Current
28
A
Power Good
VSEN1
Upper Threshold
(VSEN1/DACOUT)
VSEN1 Rising
108
110
%
VSEN1
Under Voltage
(VSEN1/DACOUT)
VSEN1 Rising
92
94
%
VSEN1
Hysteresis (VSEN1
/DACOUT)
Upper /Lower Threshold
2
%
V
PGOOD
PGOOD Voltage Low
I
PGOOD
= -4mA
0.8
V
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