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Электронный компонент: S3044

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1
S3049
2.5 GBPS LASER DRIVER
July 27, 1999 / Revision C
S3049
2.5 GBPS LASER DRIVER
FEATURES
2.5 Gbps data rate
Automatic Laser Power Control
Laser Bias Enable Input
Differential PECL Inputs
Temperature Compensated Reference Voltage
Laser Fault and Fail indicators
Selectable on-chip Re-Clocking
60 mA Modulation Current, 90 mA Bias Current
32 Pin TQFP Package
APPLICATIONS
WDM for SONET OC-48
OC-48 Fiber optic modules
OC-48 Line termination equipment
GENERAL DESCRIPTION
The S3049 has three main sections: a reference
generator, a high speed current modulation driver,
and a laser bias block with automatic power control.
The reference generator generates a temperature sta-
bilized reference voltage, V
REF
, which can be used to
program the bias and the modulation currents.
The high-speed modulation driver can switch up to
60 mA swing through the laser. The CLKSEL pin can
be used to select whether or not to re-clock the input
data.
The laser bias block sets the bias current of the laser
and has an Automatic Power Control (APC) system,
which keeps the current through the laser constant by
monitoring the current through the monitor photo-diode.
The APC loop is also used to detect excessive laser
power and low laser power. These conditions are
flagged on the LSFAULT and LSFAIL output pins
respectively.
Figure 1. Typical Operating Circuit
TD+
TD-
IMOD+
IMOD
IBIAS
IPD
IMSET
IBSET
LASER
PH DIODE
LSFAIL
LSFAULT
DISABLE
VEE
VCC1
VCC
VCC
VCC2
CDEL
VCC
VEE
VEE
VREF
IMODMON
IBIASMON
IBCMP
IPSET
VCC
TDCLK+
TDCLK
CLKSEL
DEVICE
SPECIFICATION
2
S3049
2.5 GBPS LASER DRIVER
July 27, 1999 / Revision C
Figure 2. Functional Block Diagram
TD+
TD-
IMOD+
IMOD
IBIAS
IPD
IMSET
IBSET
IPSET
LASER
PH DIODE
C
DEL
LSFAIL
LSFAULT
DISABLE
VREF
CDEL
Vnom
C
APC
Ref Gen
Circuit
+
_
+5V
CLKSEL
IBCMP
DFF
+
MUX
IBIASMON
IMODMON
TDCLK+
TDCLK-
+
+
V
NOM
+V
E
V
NOM
-V
E
Shut
Down
Control
3
S3049
2.5 GBPS LASER DRIVER
July 27, 1999 / Revision C
DETAILED DESCRIPTION
Reference Generator
The reference generator provides temperature com-
pensated reference voltage, VREF, which is used to
program the laser diode bias current, I
BIAS
, the
modulation current, I
MOD
, and the photo-diode refer-
ence current, I
PD
. The currents are set by connecting
a resistor between VREF and the respective current
source pin.
Laser Bias Block with Automatic Power
Control
The laser bias current, I
BIAS
, is set by connecting a
resistor between the IBSET pin and VREF. The cur-
rent through the resistor is amplified by a gain factor,
A
IBSET
, to generate I
BIAS
.
There is a feedback configuration to adjust the laser
bias current to maintain constant laser power as la-
ser efficiency changes with temperature and age.
Light produced by the laser diode produces an aver-
age current in the monitor photo-diode. This current
flows into the IPD pin. The IPSET current source,
whose current is set by the IPSET resistor, draws
current away from the IPD node. When the two cur-
rents are equal, the voltage at that node is set by the
nominal reference voltage, V
NOM,
of a differential am-
plifier. When the currents are not equal a voltage
change is generated across the capacitor, C
APC,
which the differential amplifier translates to a voltage
which generates a current through the IBCMP resis-
tor. This current is summed with current through the
IBSET resistor which adjusts I
BIAS
until the monitor
photo-diode current equals the nominal monitor
photo-diode current, I
PD
.
Modulation Driver
The modulation driver consists of a high speed input
buffer and a differential output stage. The modula-
tion current, I
MOD
, is programmed by connecting a
resistor between the IMSET pin and VREF.
The current through the resistor is amplified by a
gain factor, A
IMSET
, to generate I
MOD
.
If the CLKSEL input is set Low, the data input, TD+/
TD, is clocked at the input by TDCLK to provide low
jitter. If CLKSEL is High, TD+/TD will be passed
through to the modulation driver with no re-clocking.
Monitor Pins
I
BIAS
and I
MOD
are mirrored and brought out on the
IBIASMON and IMODMON pins respectively. The
monitor currents are a specified fraction of the actual
currents and are converted to a voltage by connect-
ing the pins to VCC through a resistor.
FAULT Detection
If the monitor photo-diode current increases beyond
the point which can be controlled by the APC loop,
the LSFAULT signal is asserted, indicating exces-
sive laser power (a FAULT condition). This condition
occurs when the voltage at the IPD node exceeds
V
NOM
by more than 400mv.
LSFAULT is also asserted if V
REF
is detected to ex-
ceed 3.8V, as this will generate excessively high
laser current.
FAIL Detection
If the monitor photo-diode current decreases beyond
the point which can be controlled by the APC loop,
LSFAIL is asserted, indicating low laser power (FAIL
condition). This condition occurs when the voltage at
the IPD pin drops below V
NOM
by more than 400mv.
Laser Shutdown
If a FAULT or FAIL condition is detected the laser
bias and modulation currents will be turned off.
The laser can be enabled only by toggling the DIS-
ABLE input or by initiating a power-on cycle.
LSFAULT and LSFAIL will be reset on DISABLE de-
assert or V
CC
> 4.4V.
If the CDEL
pin is grounded, the shutdown of the
laser currents on a FAULT or FAIL detection is dis-
abled, and LSFAIL or LSFAULT will de-assert when
the FAULT or FAIL condition no longer exists.
Start-up Sequence
The laser bias and modulation currents are turned
on within a time t
ON
from when V
CC
exceeds 4.4V or
from when the DISABLE input is de-asserted. During
the period t
DELAY
, set by the capacitor C
DEL
, the
shutdown of the laser is disabled in order to allow
the APC loop time to settle. During this time
if a
FAULT or FAIL condition is detected the laser will
not be shut down as it could be caused by the APC
loop transient state. C
DEL
should be chosen such
that t
DELAY
is much longer than the APC loop settling
time. LSFAULT and LSFAIL will not assert during
t
DELAY
.
4
S3049
2.5 GBPS LASER DRIVER
July 27, 1999 / Revision C
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Table 1. Pin Assignment and Descriptions
5
S3049
2.5 GBPS LASER DRIVER
July 27, 1999 / Revision C
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Table 1. Pin Assignment and Descriptions (Continued)