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EV3041A
SONET/SDH OC-48 TRANSCEIVER EVALUATION BOARD
March 29, 1999
PRELIMINARY 1.1
EV3041A
SONET/SDH OC-48 TRANSCEIVER EVALUATION BOARD
EVALUATION BOARD OVERVIEW
This document describes the operation and usage of the AMCC S3041/S3042 Evaluation Board with the HP
HFCT-5402D Single Mode Fiber Transceiver. The evaluation board allows users to become familiar with the
functionality of the S3041 transmitter and S3042 receiver combination. Specifically, bit error rate (BER), jitter
generation, and loopback mode can be tested using this evaluation board. This document provides a complete
board description, explains various test configurations, board layout, test equipment list, and contains a board
schematic. This document should be used in conjunction with the S3041,S3042 and HP HFCT-5402D data
sheets and application notes. Figure 1 shows an outline of the S3041/S3042 Evaluation Board.
Figure 1. S3041/S3042 Evaluation Board (Top View)
S3041
NOISE
INJECT
S3042
POCLKP/N
POUT[7:0]P/N
FPP/N
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KILLRXCLK
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OOF
LLEB
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INJECT
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B
SEARCH
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REFCLKP
S3041
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VCC
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VCC
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-2V GND
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NOISE
INJECT
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RSTB
THDIODE
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16
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GND
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LM-
LM+
SD
RSDP
RSDN
RSCLKN
RSCLKP
OPTICS POWER
EL33
EL33
EL51
EL51
EL16
EL16
AMCC
6290 SEQUENCE DR.
SAN DIEGO, CA 92121
APPLIED MICRO CIRCUITS CORPORATION
S8401/S8501 SERIALIZER AND DESERIALIZER
2
2
*
*
*
*
*
*
*
Zero ohm jumper
location.
A
C
D
C
A
D
D
HP HFCT-5402D
2.488GB/s
Single-Mode
Fiber Transceiver
PRELIMINARY 1.1
2
EV3041A
SONET/SDH OC-48 TRANSCEIVER EVALUATION BOARD
March 29, 1999
PRELIMINARY 1.1
EVALUATION BOARD DESCRIPTION
This section describes the functionality of the connectors and recommended settings for the S3041/S3042
Evaluation Board. A brief description of the SMA connectors, DIP switch descriptions and settings, power and
grounds, output levels, probes, and header settings will all be discussed. The letters "A", "B", "C", and "D"
correspond to specific parts on the evaluation board, and are described in the following section according to their
letter designation as shown in Figure 1.
[A] SMA Connectors
SMA connectors are provided for the differential serial data input/output signals, noise injects, and reference
clocks. Table 1 gives a description of the SMA connectors on the S3041/S3042 Evaluation Board.
Table 1. SMA Connectors and Description
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3
EV3041A
SONET/SDH OC-48 TRANSCEIVER EVALUATION BOARD
March 29, 1999
PRELIMINARY 1.1
[B] DIP Switches
The Evaluation Board is equipped with one 6 switch DIP switch and one 4 switch DIP switch to control the static
control functions of the S3042 and S3041 respectively. For both devices the OFF (open = "0") condition of the
DIP switch asserts a logic low on the assigned signal, and the ON (closed = "1") condition asserts a logic high.
Note that "0" and "1" are printed on the evaluation board. Table 2 describes each of the DIP switches on the
evaluation board. Table 3 shows the specific DIP switch setting needed for various test conditions.
Table 2. DIP Switch Descriptions
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4
EV3041A
SONET/SDH OC-48 TRANSCEIVER EVALUATION BOARD
March 29, 1999
PRELIMINARY 1.1
Table 3. DIP Switch Settings for Test and Evaluation Configurations
1
4
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RSTB Pushbutton Switch -- This momentary contact switch controls the master reset of the S3041/S3042.
Please refer to the S3041/S3042 data sheet for details of the specific control functions. Normal mode for this
master reset input is normally high. Depressing the switch connects this input to logic zero and resets the
S3041/S3042.
[C] Power/Ground
Terminal posts are provided at the top edge of the board for VCC and VEE (Terminal post voltage settings are
given in Table 4.). Figure 2 demonstrates the type of input setting and the corresponding output waveform that
the S3042 outputs.
Table 4. Evaluation Board Terminal Post Power and Ground Settings
t
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1. These voltages may vary based on the type of test equipment used. Table 5
shows alternate voltage settings.
2. Supplies VEE rail of Motorola ECLIPs parts.
5
EV3041A
SONET/SDH OC-48 TRANSCEIVER EVALUATION BOARD
March 29, 1999
PRELIMINARY 1.1
The external test equipment environment or other standard ECL and/or +3.3V Referenced ECL systems can
interface to the S3041/S3042 Evaluation Board. The board as shown in Figures 4-6 can be powered to allow
easy connection to a standard 50 Ohm to ground inputs of high performance oscilloscopes and spectrum
analyzers as well as the standard ECL I/O of serial Bit Error Rate Testers (BERT) and Jitter Analyzers (see
Table 5 for DUT voltage settings). The nominal input voltages for VCC and VEE (per Table 4) with the resulting
voltage levels are shown in Figures 2 and 3. Figure 2 shows the S3042 output with S3042 VCC = +3.3V. Note
that the TTL output voltage levels are dependent on VCC. Figure 3 shows that the CML output voltages track
with VCC. For input and output signal types and terminations, refer to the respective device datasheet.
Table 5. Power Connections Interface for DUT to Test Equipment
Figure 2. S3042 TTL Outputs (D0-D7) with S3042VCC = +3.3V
Figure 3. S3041 Differential CML Output (TSDP/N) with S3041 VCC = +3.3V
VCC = +3.3V +/- 5%
2.2V
1.35V
0.5V
VEE = 0V
TTL
VEE = 0V
VCC = +3.3V +/- 5%
Termination = 50 Ohms to GND
CML
+0.2V
0V
0.2V
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