ASM1832
Alliance Semiconductor
2575 Augustine Drive . Santa Clara, CA 95054 . Tel: 408.855.4900 . Fax: 408.855.4999 . www.alsc.com
Notice: The information in this document is subject to change without notice
rev 1.5
3.3V P Power Supply Monitor and Reset Circuit
February 2005
General Description
The ASM1832 is a fully integrated microprocessor supervisor. It
can halt and restart a "hung-up" microprocessor, restart a
microprocessor after a power failure. It has a watchdog timer
and external reset override. RESET and RESET outputs are
push-pull.
A precision temperature-compensated reference and
comparator circuits monitor the 3.3V, V
CC
input voltage status.
During power-up or when the V
CC
power supply falls outside
selectable tolerance limits, both RESET and RESET become
active. When V
CC
rises above the threshold voltage, the reset
signals remain active for an additional 250ms minimum,
allowing the power supply and system microprocessor to
stabilize. The trip point tolerance signal, TOL, selects the trip
level tolerance to be either 10% or 20%.
A debounced manual reset input, PBRST, activates the reset
outputs for a minimum period of 250ms. There is a watchdog
timer to stop and restart a microprocessor that is "hung-up".
The watchdog timeouts periods are selectable: 150ms, 610ms,
and 1200ms. If the ST input is not strobed LOW before the
time-out period expires, a reset is generated.
Devices are available in 8-pin PDIP, 8-pin SO and compact 8-
pin MicroSO packages.
Key Features
3.3V supply monitor
Push-pull output
Selectable watchdog period
Debounce manual push-button reset input
Precision temperature-compensated voltage reference
and comparator.
Power-up, power-down and brown out detection
250ms minimum reset time
Active LOW and HIGH reset signal
Selectable trip point tolerance: 10% or 20%
Low-cost 8-pin DIP/SO and 8-pin Micro SO packages
Wide operating temperature -40C to +85C
Applications
Microprocessor systems
Computers
Controllers
Portable instruments
Automotive systems
Typical Operating Circuit
Block Diagram
Tolerance Selection
Reference
Push Button
Debounce
Voltage Sense
Comparator
Reset &
Watchdog Timer
Watchdog
Transition Detector
+
-
V
CC
TOL
PBRST
TD
ST
RESET
RESET
40K
V
CC
V
CC
V
CC
GND
ASM1832
ST
RESET
RESET
I/O
P
ASM1832
GND
TOL
TD
3.3V
ASM1832
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Notice: The information in this document is subject to change without notice
3.3V P Power Supply Monitor and Reset Circuit
rev 1.5
February 2005
Pin Configuration
Pin Description
Pin #
8-Pin Package
Pin Name
Function
1
PBRST
Debounced manual pushbutton reset input.
2
TD
Watchdog time delay selection. (t
TD
= 150ms for TD = GND, t
TD
= 610ms for
TD=Open, and t
TD
= 1200ms for TD = V
CC
).
3
TOL
Selects 10% (TOL connected to GND) or 20% (TOL connected to V
CC
) trip point
tolerance.
4
GND
Ground.
5
RESET
Active HIGH reset output. RESET is active:
1. If V
CC
falls below the reset voltage trip point.
2. If PBRST is LOW.
3. If ST is not strobed LOW before the timeout period set by TD expires.
4. During power-up.
6
RESET
Active LOW reset output. (See RESET).
7
ST
Strobe input.
8
V
CC
3.3V power.
1
2
3
4
5
6
7
8
PBRST
TD
TOL
GND
V
CC
ST
RESET
RESET
ASM1832
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Notice: The information in this document is subject to change without notice
3.3V P Power Supply Monitor and Reset Circuit
ASM1832
rev 1.5
February 2005
Detailed Description
The ASM1832 monitors the microprocessor or
microcontroller power supply and issues reset signals, both
active HIGH and active LOW, that halt processor operation
whenever the power supply voltage levels are outside a
predetermined tolerance.
RESET and RESET outputs
RESET and RESET signals are active for a minimum of
250ms after the supply has returned to in-tolerance level.
This allows the power supply and monitored processor to
stabilize before instruction execution is allowed to begin.
Trip Point Tolerance Selection
The TOL input is used to determine the level V
CC
can vary
below 3.3V without asserting a reset. With TOL conected to
V
CC
, RESET and RESET become active whenever V
CC
falls
below 2.64V. RESET and RESET become active when the
V
CC
falls below 2.98V if TOL is connected to ground.
After V
CC
has risen above the trip point set by TOL, RESET
and RESET remain active for a minimum time period of
250ms. On power-down, once V
CC
falls below the reset
threshold RESET stays LOW and is guaranteed to be 0.4V or
less until V
CC
drops below 1.2V. The reset output on the
ASM1832 uses a push-pull drive stage that can maintain a
valid output below 1.2V. To sink current with V
CC
below 1.2V,
a resistor can be connected from the reset pin (RESET) to
Ground. This configuration will give a valid value on the reset
output with V
CC
approaching 0V. During both power up and
down, the configuration will draw current when the RESET is
in the high state. The value of 100K
should be adequate to
maintain a valid condition. The active HIGH reset signal is
valid down to a V
CC
level of 1.2V also.
.
Application Information
Manual Reset Operation
Push-button switch input, PBRST, allows the user to override
the internal trip point detection circuits and issue reset
Microprocessor
RESET
RESET
ASM1832
100k
Tolerance
Select
Tolerance
TRIP Point Voltage
(V)
Min
Nom
Max
TOL = V
CC
20%
2.47
2.55
2.64
TOL = GND
10%
2.80
2.88
2.97
~~
~~~~
V
OH
V
OL
t
RPU
RESET
RESET
V
CCTP
(MIN)
V
CCTP
(MAX)
V
CCTP
t
R
V
CC
Figure 1: Timing Diagram : Power Up
~ ~
~~
~~
V
OH
V
OL
V
CCTP
(MAX)
V
CCTP
V
CCTP
(MIN)
RESET
RESET
t
F
V
CC
t
RPD
Figure 2: Timing Diagram : Power Down
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Notice: The information in this document is subject to change without notice
3.3V P Power Supply Monitor and Reset Circuit
ASM1832
rev 1.5
February 2005
signals. The pushbutton input is debounced and is pulled
HIGH through an internal 40k
resistor.
When PBRST is held LOW for the minimum time t
PB
, both
resets become active and remain active for a minimum time
period of 250ms after PBRST returns HIGH.
The debounced input is guaranteed to recognize pulses
greater than 20ms. No external pull-up resistor is required,
since PBRST is pulled HIGH by an internal 40k
resistor.
The PBRST can be driven from a TTL or CMOS logic line or
shorted to ground with a mechanical switch.
Watchdog Timer and ST Input
A watchdog timer stops and restarts a microprocessor that is
"hung-up". The P must toggle the ST input within a set
period (as selectable through TD input) to verify proper
software execution. If the ST is not toggled low within the
minimum timeout period, reset signals become active. On
power-up after the supply voltage returns to an in-tolerance
condition, the reset signal remains active for 250ms
minimum, allowing the power supply and system
microprocessor to stabilize.
ST Pulses as short as 20ns can be detected.
Timeouts periods of approximately 150ms, 610ms or
1,200ms are selected through the TD pin.
The watchdog timer can not be disabled. It must be strobed
with a high-to-low transition to avoid watchdog timeout and
reset.
~ ~
~ ~
~ ~
V
OH
V
OL
RESET
RESET
PBRST
t
PB
t
PDLY
V
IH
t
RST
Figure 3: Timing Diagram: Pushbutton Reset
PBRST
T
D
TOL
GND
V
CC
ST
RESET
RESET
1
2
3
4
5
6
7
8
P
RESET
Supply
Voltage
ASM1832
Figure 4: Application Circuit: Pushbutton Reset
V
IL
I/O
TD Voltage level
Watchdog Time-out Period
(ms)
Min
Nom
Max
GND
62.5
150
250
Floating
250
610
1000
V
CC
500
1200
2000
~ ~
Valid
Valid
Invalid
ST
RESET
t
RST
t
ST
t
TD
(min)
t
TD
(max)
Strobe
Strobe
Strobe
Figure 5: Timing Diagram: Strobe Input
Note: ST is ignored whenever a reset is active
PBRST
T
D
TOL
GND
V
CC
ST
RESET
1
2
3
4
6
7
8
P
RESET
Supply
Voltage
ASM1832
Figure 6: Application Circuit: Watchdog Timer
Decoder
Address
Bus
MREQ
5
RESET
ASM1832
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Notice: The information in this document is subject to change without notice
3.3V P Power Supply Monitor and Reset Circuit
rev 1.5
February 2005
Absolute Maximum Ratings
DC Electrical Characteristics
Unless otherwise stated, 1.2 <= V
CC
<=5.5V and over the operating temperature range of -40C to +85C. All voltages are
referenced to ground.
Parameter
Min
Max
Unit
Voltage on VCC
-0.5
7
V
Voltage on ST, TD
-0.5
V
CC
+ 0.5
V
Voltage on PBRST, RESET, RESET
-0.5
V
CC
+ 0.5
V
Operating Temperature Range
-40
+85
C
Soldering Temperature (for 10 sec)
+260
C
Storage Temperature
-55
+125
C
ESD rating
HBM
MM
2
200
KV
V
Note:
1. Voltages are measured with respect to ground
2. These are stress ratings only and functional implication is not implied. Exposure to absolute maxi-
mum ratings for extended periods may affect device reliability.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Supply Voltage
V
CC
1.0
5.5
V
ST and PBRST Input High
Level
V
IH
V
CC
>=2.7V
2
V
CC
+ 0.3
V
ST and PBRST Input High
Level
V
IH
V
CC
<2.7V
V
CC
- 0.4V
V
ST and PBRST Input Low
Level
V
IL
-0.3
0.5
V
V
CC
Trip Point (T
OL
= GND)
V
CCTP
2.80
2.88
2.97
V
V
CC
Trip Point (T
OL
= V
CC
)
V
CCTP
2.47
2.55
2.64
V
Watchdog Timeout Period
t
TD
T
D
= GND
62.5
150
250
ms
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