Advanced Power
P-CHANNEL ENHANCEMENT MODE
Electronics Corp.
POWER MOSFET
Simple Drive Requirement
BV
DSS
-20V
2.5V Gate Drive Capability
R
DS(ON)
150m
I
D
-10A
Description
Absolute Maximum Ratings
Symbol
Units
V
DS
V
V
GS
V
I
D
@T
A
=25
A
I
D
@T
A
=100
A
I
DM
A
P
D
@T
A
=25
W
W/
T
STG
T
J
Symbol
Value
Unit
Rthj-c
Thermal Resistance Junction-case
Max.
5.0
/W
Rthj-a
Thermal Resistance Junction-ambient
Max.
110
/W
Data and specifications subject to change without notice
201225023
AP3310H/J
Rating
- 20
12
-10
0.01
25
-55 to 150
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
-6.2
Pulsed Drain Current
1
-24
Parameter
Total Power Dissipation
Operating Junction Temperature Range
Storage Temperature Range
-55 to 150
Linear Derating Factor
Thermal Data
The Advanced Power MOSFETs from APEC provide the
designer with the best combination of fast switching,
, low on-resistance and cost-effectiveness.
G
D
S
G D
S
TO-252(H)
G
D
S
TO-251(J)
This device is suited for low voltage and battery power
applications.
AP3310H/J
Electrical Characteristics@T
j
=25
o
C(unless otherwise specified)
Symbol
Parameter
Test Conditions
Min. Typ. Max. Units
BV
DSS
Drain-Source Breakdown Voltage
V
GS
=0V, I
D
=-250uA
-20
-
-
V
B
V
DSS
/T
j
Breakdown Voltage Temperature Coefficient
Reference to 25
, I
D
=-1mA
-
-0.1
-
V/
R
DS(ON)
Static Drain-Source On-Resistance
V
GS
=-4.5V, I
D
=-2.8A
-
-
150
m
V
GS
=-2.5V, I
D
=-2.0A
-
-
250
m
V
GS(th)
Gate Threshold Voltage
V
DS
=V
GS
, I
D
=-250uA
-0.5
-
-
V
g
fs
Forward Transconductance
V
DS
=-5V, I
D
=-2.8A
-
4.4
-
S
I
DSS
Drain-Source Leakage Current (T
j
=25
o
C)
V
DS
=-20V, V
GS
=0V
-
-
-1
uA
Drain-Source Leakage Current (T
j
=150
o
C)
V
DS
=-16V, V
GS
=0V
-
-
-25
uA
I
GSS
Gate-Source Leakage
V
GS
=
-
-
nA
Q
g
Total Gate Charge
2
I
D
=-2.8A
-
6
-
nC
Q
gs
Gate-Source Charge
V
DS
=-6V
-
1.5
-
nC
Q
gd
Gate-Drain ("Miller") Charge
V
GS
=-5V
-
0.6
-
nC
t
d(on)
Turn-on Delay Time
2
V
DS
=-6V
-
25
-
ns
t
r
Rise Time
I
D
=-1A
-
60
-
ns
t
d(off)
Turn-off Delay Time
R
G
=6
,
V
GS
=-5V
-
70
-
ns
t
f
Fall Time
R
D
=6
-
60
-
ns
C
iss
Input Capacitance
V
GS
=0V
-
300
-
pF
C
oss
Output Capacitance
V
DS
=-6V
-
180
-
pF
C
rss
Reverse Transfer Capacitance
f=1.0MHz
-
60
-
pF
Source-Drain Diode
Symbol
Parameter
Test Conditions
Min. Typ. Max. Units
I
S
Continuous Source Current ( Body Diode )
V
D
=V
G
=0V , V
S
=-1.2V
-
-
-10
A
I
SM
Pulsed Source Current ( Body Diode )
1
-
-
-24
A
V
SD
Forward On Voltage
2
T
j
=25
, I
S
=-10A, V
GS
=0V
-
-
-1.2
V
Notes:
1.Pulse width limited by safe operating area.
2.Pulse width <300us , duty cycle <2%.
12
V
100
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
AP3310H/J
0
6
12
18
24
0.0
2.5
5.0
7.5
10.0
-V
DS
, Drain-to-Source Voltage (V)
-I
D
,
Dra
i
n C
u
rre
nt
(A
)
T
C
=25
o
C
-4.5V
-4.0V
-3.5V
-3.0V
-2.5V
V
GS
= -2.0V
0
5
10
15
20
0
2
4
6
8
-V
DS
, Drain-to-Source Voltage (V)
-I
D
, D
r
ain C
u
rrent (A
)
T
C
=150
o
C
-4.5V
-4.0V
-3.5V
-3.0V
-2.5V
V
GS
= -2.0V
0.6
0.9
1.2
1.5
1.8
-50
0
50
100
150
T
j
, Junction Temperature (
o
C)
No
rma
l
i
z
e
d
R
DS
(
ON)
I
D
= -2.8A
V
GS
= -4.5V
0
200
400
600
800
0
2
4
6
8
10
-V
GS
(V)
R
DS
(
ON)
(m
)
I
D
= -2.8A
T
C
=25
AP3310H/J
Fig 5. Maximum Drain Current v.s.
Fig 6. Typical Power Dissipation
Case Temperature
Fig 7. Maximum Safe Operating Area
Fig 8. Effective Transient Thermal Impedance
0
2
4
6
8
10
25
50
75
100
125
150
T
c
, Case Temperature (
o
C)
-I
D
,
Dra
i
n C
u
rre
nt
(A
)
0
5
10
15
20
25
30
0
50
100
150
T
c
, Case Temperature (
o
C)
P
D
(W
)
0.01
0.1
1
0.00001
0.0001
0.001
0.01
0.1
1
t , Pulse Width (s)
N
o
r
m
aliz
ed T
h
er
m
a
l Res
pon
s
e
(
R
th
jc
)
P
DM
Duty Factor = t/T
Peak T
j
= P
DM
x R
thjc
+ T
C
t
T
0.02
0.01
0.05
0.1
0.2
Duty Factor = 0.5
Single Pulse
1
10
100
1
10
100
-V
DS
(V)
-I
D
(A
)
1ms
10ms
100ms
T
C
=25 C
Single Pulse
100us
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
Fig 11. Forward Characteristic of
Fig 12. Gate Threshold Voltage v.s.
Reverse Diode
Junction Temperature
AP3310H/J
0
1
2
3
4
5
0
2
4
6
8
Q
G
, Total Gate Charge (nC)
-V
GS
, G
a
te to S
o
u
r
ce Voltage (
V
)
I
D
=-2.8A
V
DS
=-6V
10
100
1000
1
3
5
7
9
11
13
-V
DS
(V)
C (
p
F)
f=1.0MHz
Ciss
Coss
Crss
0
1
10
0.3
0.5
0.7
0.9
1.1
1.3
1.5
-V
SD
(V)
-I
S
(A
)
T
j
=25
o
C
T
j
=150
o
C
0
0.5
1
1.5
-50
0
50
100
150
T
j
, Junction Temperature (
o
C)
-V
GS(
t
h)
(V
)
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